TIM_OCInactive

  ******************** (C) COPYRIGHT 2010 STMicroelectronics *******************
  * @file    TIM/OCInactive/readme.txt 
  * @author  MCD Application Team
  * @version V3.4.0
  * @date    10/15/2010
  * @brief   Description of the TIM OCInactive example.
  ******************************************************************************
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  ******************************************************************************
   
Example Description

This example shows how to configure the TIM peripheral in Output Compare Inactive mode with the corresponding Interrupt requests for each channel.

The TIM2CLK frequency is set to SystemCoreClock / 2 (Hz), and the objective is to get TIM2 counter clock at 1 KHz so the Prescaler is computed as following:

The TIM2 CCR1 register value is equal to 1000: TIM2_CC1 delay = CCR1_Val/TIM2 counter clock = 1000 ms so the PC.06 is reset after a delay equal to 1000 ms.

The TIM2 CCR2 register value is equal to 500: TIM2_CC2 delay = CCR2_Val/TIM2 counter clock = 500 ms so the PC.07 is reset after a delay equal to 500 ms.

The TIM2 CCR3 register value is equal to 250: TIM2_CC3 delay = CCR3_Val/TIM2 counter clock = 250 ms so the PC.08 is reset after a delay equal to 250 ms.

The TIM2 CCR4 register value is equal to 125: TIM2_CC4 delay = CCR4_Val/TIM2 counter clock = 125 ms so the PC.09 is reset after a delay equal to 125 ms.

While the counter is lower than the Output compare registers values, which determines the Output delay, the PC.06, PC.07, PC.08 and PC.09 pin are turned on.

When the counter value reaches the Output compare registers values, the Output Compare interrupts are generated and, in the handler routine, these pins are turned off.

Directory contents
Hardware and Software environment
How to use it ?

In order to make the program work, you must do the following:

Tip: You can tailor the provided project template to run this example, for more details please refer to "stm32f10x_stdperiph_lib_um.chm" user manual; select "Peripheral Examples" then follow the instructions provided in "How to proceed" section.

Note:
  • Low-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Medium-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • High-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • High-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 512 and 1024 Kbytes.
  • Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.

© COPYRIGHT 2010 STMicroelectronics

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