TIM_Cascade_Synchro

  ******************** (C) COPYRIGHT 2010 STMicroelectronics *******************
  * @file    TIM/Cascade_Synchro/readme.txt 
  * @author  MCD Application Team
  * @version V3.4.0
  * @date    10/15/2010
  * @brief   Description of the TIM Cascade_Synchro example.
  ******************************************************************************
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  ******************************************************************************
   
Example Description

This example shows how to synchronize TIM peripherals in cascade mode. In this example three timers are used:

Timers synchronisation in cascade mode:

1/TIM2 is configured as Master Timer:

2/TIM3 is slave for TIM2 and Master for TIM4,

3/TIM4 is slave for TIM3,

o For Low-density, Medium-density, High-density and Connectivity line devices: The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz.

The Master Timer TIM2 is running at TIM2 frequency : TIM2 frequency = (TIM2 counter clock)/ (TIM2 period + 1) = 281.250 KHz and the duty cycle = TIM2_CCR1/(TIM2_ARR + 1) = 25%.

The TIM3 is running at: (TIM2 frequency)/ (TIM3 period + 1) = 70.312 KHz and a duty cycle equal to TIM3_CCR1/(TIM3_ARR + 1) = 25%

The TIM4 is running at: (TIM3 frequency)/ (TIM4 period + 1) = 17.578 Hz and a duty cycle equal to TIM4_CCR1/(TIM4_ARR + 1) = 25%

o For Low-Density Value line, Medium-Density and High-Density Value line devices: The TIMxCLK is fixed to 24 MHz, the TIM2 counter clock is 24 MHz. So TIM2 frequency = 93.750 KHz, TIM3 is running at 23.437 KHz, and TIM4 is running at 5.85 KHz

Directory contents
Hardware and Software environment
How to use it ?

In order to make the program work, you must do the following:

Tip: You can tailor the provided project template to run this example, for more details please refer to "stm32f10x_stdperiph_lib_um.chm" user manual; select "Peripheral Examples" then follow the instructions provided in "How to proceed" section.

Note:
  • Low-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Medium-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • High-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • High-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 512 and 1024 Kbytes.
  • Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.

© COPYRIGHT 2010 STMicroelectronics

STM32F10x Standard Peripherals Library: Footer

 

 

 

      For complete documentation on STM32(CORTEX M3) 32-bit Microcontrollers platform visit  www.st.com/STM32