I2S_Interrupt

  ******************** (C) COPYRIGHT 2010 STMicroelectronics *******************
  * @file    I2S/Interrupt/readme.txt 
  * @author  MCD Application Team
  * @version V3.4.0
  * @date    10/15/2010
  * @brief   Description of the I2S Interrupt Example.
  ******************************************************************************
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Example Description

This example provides a description of how to set a communication between two SPIs in I2S mode using interrupts and performing a transfer from Master to Slave.

In the first step, I2S3 is configured as master transmitter and I2S2 as slave reciever and both are in Phillips standard configuration with 16bit extended to 32 bit data packet and 48KHz audio frequnecy.

The I2S3 transmit interrupt and the I2S2 receive interrupt are both enabled. And in these interrupts subroutines, the I2S3_Buffer_Tx is transmitted and the received values are loaded in the I2S2_Buffer_Rx buffer. Only the significant 16 MSBs are sent and received, while the 32 packet remaining 16 LSBs are filled with 0 values and don't generate any interrupt.

Once the transfer is completed a comparison is done and TransferStatus1 gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED.

In the second step both peripherals are configured in I2S Phillips standard 24 bits data length in 32 bits packets and 16KHz audio frequency. The interrupts are enabled and the transfer is performed from the I2S3 master to the I2S2 slave. The 24 bits are transmited then the 8 remaining LSBs are filled automatically with 0 values.

Once the transfer is completed a comparison is done (on the 24 MSBs only, the 8 LSBs are replaced by 0) and TransferStatus2 gives the data transfer status where it is PASSED if transmitted and received data are the same otherwise it is FAILED.

Directory contents
Hardware and Software environment

Since some SPI3/I2S3 pins are shared with JTAG pins (SPI3_NSS/I2S3_WS with JTDI and SPI3_SCK/I2S3_CK with JTDO), they are not controlled by the I/O controller and are reserved for JTAG usage (after each Reset). For this purpose prior to configure the SPI3/I2S3 pins:

How to use it ?

In order to make the program work, you must do the following:

Tip: You can tailor the provided project template to run this example, for more details please refer to "stm32f10x_stdperiph_lib_um.chm" user manual; select "Peripheral Examples" then follow the instructions provided in "How to proceed" section.

Note:
  • Low-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Medium-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • High-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • High-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 512 and 1024 Kbytes.
  • Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.

© COPYRIGHT 2010 STMicroelectronics

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