DMA_I2C_RAM

  ******************** (C) COPYRIGHT 2010 STMicroelectronics *******************
  * @file    DMA/I2C_RAM/readme.txt 
  * @author  MCD Application Team
  * @version V3.4.0
  * @date    10/15/2010
  * @brief   Description of the DMA I2C example.
  ******************************************************************************
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  ******************************************************************************
   
Example Description

This example provides a description of how to use two DMA channels to transfer a data buffer from memory to I2C2 through I2C1.

I2C1 is set as the master transmitter and I2C2 as the slave receiver. DMA1 Channel5 is configured to store the data received from I2C2 into the Rx buffer (reception buffer). DMA1 Channel6 is configured to transfer data from the Tx buffer (transmission buffer) to the I2C1 DR register. After the generation of the Start condition and once the slave address has been acknowledged, DMA capability is enabled for both I2C1 and I2C2. As soon as the two I2C DMAEN bits are set in the I2C1_CR2 and I2C2_CR2 registers, the transmission of the Tx buffer is started by DMA1 Channel5 and at the same time the data received on I2C2 is stored in Rx buffer using DMA1 Channel6 . The transmitted and the received buffers are compared to check that all data have been correctly transferred.

Directory contents
Hardware and Software environment
How to use it ?

In order to make the program work, you must do the following :

Tip: You can tailor the provided project template to run this example, for more details please refer to "stm32f10x_stdperiph_lib_um.chm" user manual; select "Peripheral Examples" then follow the instructions provided in "How to proceed" section.

Note:
  • Low-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Medium-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • High-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • High-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 512 and 1024 Kbytes.
  • Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.

© COPYRIGHT 2010 STMicroelectronics

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