DMA_FSMC

  ******************** (C) COPYRIGHT 2010 STMicroelectronics *******************
  * @file    DMA/FSMC/readme.txt 
  * @author  MCD Application Team
  * @version V3.4.0
  * @date    10/15/2010
  * @brief   Description of the DMA FSMC Example.
  ******************************************************************************
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  ******************************************************************************
   
Example Description

This example provides a description of how to use two DMA channels to transfer a word data buffer from Flash memory to external SRAM memory and to recuperate the written data from external SRAM to be stored in internal SRAM.

DMA2 Channel5 is configured to transfer, word by word, the contents of a 32-word data buffer stored in Flash memory to the external SRAM memory interfaced by FSMC. The start of transfer is triggered by software. DMA2 Channel5 memory-to-memory transfer is enabled. Source and destination address incrementing is also enabled. The transfer is started by setting the Channel enable bit for DMA2 Channel5. A polling on the Transfer Complete flag is done to check the end of transfer. The DMA2 Channel5 Transfer complete flag is then cleared.

DMA1 Channel3 is configured to transfer, byte by byte, the contents of the first 128Bytes of external SRAM to the internal SRAM memory. The start of transfer is triggered by software. DMA1 Channel3 memory-to-memory transfer is enabled. Source and destination address incrementing is also enabled. The transfer is started by setting the Channel enable bit for DMA1 Channel3. A polling on the Transfer Complete flag is done to check the end of transfer.

A comparison between the source and destination buffers is done to check that all data have been correctly transferred.

Directory contents
Hardware and Software environment
How to use it ?

In order to make the program work, you must do the following :

Tip: You can tailor the provided project template to run this example, for more details please refer to "stm32f10x_stdperiph_lib_um.chm" user manual; select "Peripheral Examples" then follow the instructions provided in "How to proceed" section.

Note:
  • Low-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
  • Medium-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
  • High-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • High-density Value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 256 and 512 Kbytes.
  • XL-density devices are STM32F101xx and STM32F103xx microcontrollers where the Flash memory density ranges between 512 and 1024 Kbytes.
  • Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.

© COPYRIGHT 2010 STMicroelectronics

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