FSMC_NORSRAMTimingInitTypeDef Struct Reference
[FSMC_Exported_Types]

Timing parameters For NOR/SRAM Banks. More...

#include <stm32f10x_fsmc.h>

Data Fields

uint32_t FSMC_AccessMode
uint32_t FSMC_AddressHoldTime
uint32_t FSMC_AddressSetupTime
uint32_t FSMC_BusTurnAroundDuration
uint32_t FSMC_CLKDivision
uint32_t FSMC_DataLatency
uint32_t FSMC_DataSetupTime

Detailed Description

Timing parameters For NOR/SRAM Banks.

Definition at line 49 of file stm32f10x_fsmc.h.


Field Documentation

Specifies the asynchronous access mode. This parameter can be a value of FSMC_Access_Mode

Definition at line 83 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().

Defines the number of HCLK cycles to configure the duration of the address hold time. This parameter can be a value between 0 and 0xF.

Note:
: It is not used with synchronous NOR Flash memories.

Definition at line 56 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().

Defines the number of HCLK cycles to configure the duration of the address setup time. This parameter can be a value between 0 and 0xF.

Note:
: It is not used with synchronous NOR Flash memories.

Definition at line 51 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().

Defines the number of HCLK cycles to configure the duration of the bus turnaround. This parameter can be a value between 0 and 0xF.

Note:
: It is only used for multiplexed NOR Flash memories.

Definition at line 66 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().

Defines the period of CLK clock output signal, expressed in number of HCLK cycles. This parameter can be a value between 1 and 0xF.

Note:
: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses.

Definition at line 71 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().

Defines the number of memory clock cycles to issue to the memory before getting the first data. The value of this parameter depends on the memory type as shown below:

  • It must be set to 0 in case of a CRAM
  • It is donít care in asynchronous NOR, SRAM or ROM accesses
  • It may assume a value between 0 and 0xF in NOR Flash memories with synchronous burst mode enable

Definition at line 75 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().

Defines the number of HCLK cycles to configure the duration of the data setup time. This parameter can be a value between 0 and 0xFF.

Note:
: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories.

Definition at line 61 of file stm32f10x_fsmc.h.

Referenced by FSMC_NORSRAMInit(), FSMC_NORSRAMStructInit(), LCD_FSMCConfig(), NOR_Init(), OneNAND_Init(), and SRAM_Init().


The documentation for this struct was generated from the following file:
STM32F10x Standard Peripherals Library: Footer

 

 

 

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