stm32f10x_spi.h

Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_spi.h
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file contains all the functions prototypes for the SPI firmware 
00008   *          library.
00009   ******************************************************************************
00010   * @copy
00011   *
00012   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00013   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00014   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00015   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00016   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00017   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00018   *
00019   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00020   */ 
00021 
00022 /* Define to prevent recursive inclusion -------------------------------------*/
00023 #ifndef __STM32F10x_SPI_H
00024 #define __STM32F10x_SPI_H
00025 
00026 #ifdef __cplusplus
00027  extern "C" {
00028 #endif
00029 
00030 /* Includes ------------------------------------------------------------------*/
00031 #include "stm32f10x.h"
00032 
00033 /** @addtogroup STM32F10x_StdPeriph_Driver
00034   * @{
00035   */
00036 
00037 /** @addtogroup SPI
00038   * @{
00039   */ 
00040 
00041 /** @defgroup SPI_Exported_Types
00042   * @{
00043   */
00044 
00045 /** 
00046   * @brief  SPI Init structure definition  
00047   */
00048 
00049 typedef struct
00050 {
00051   uint16_t SPI_Direction;           /*!< Specifies the SPI unidirectional or bidirectional data mode.
00052                                          This parameter can be a value of @ref SPI_data_direction */
00053 
00054   uint16_t SPI_Mode;                /*!< Specifies the SPI operating mode.
00055                                          This parameter can be a value of @ref SPI_mode */
00056 
00057   uint16_t SPI_DataSize;            /*!< Specifies the SPI data size.
00058                                          This parameter can be a value of @ref SPI_data_size */
00059 
00060   uint16_t SPI_CPOL;                /*!< Specifies the serial clock steady state.
00061                                          This parameter can be a value of @ref SPI_Clock_Polarity */
00062 
00063   uint16_t SPI_CPHA;                /*!< Specifies the clock active edge for the bit capture.
00064                                          This parameter can be a value of @ref SPI_Clock_Phase */
00065 
00066   uint16_t SPI_NSS;                 /*!< Specifies whether the NSS signal is managed by
00067                                          hardware (NSS pin) or by software using the SSI bit.
00068                                          This parameter can be a value of @ref SPI_Slave_Select_management */
00069  
00070   uint16_t SPI_BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
00071                                          used to configure the transmit and receive SCK clock.
00072                                          This parameter can be a value of @ref SPI_BaudRate_Prescaler.
00073                                          @note The communication clock is derived from the master
00074                                                clock. The slave clock does not need to be set. */
00075 
00076   uint16_t SPI_FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
00077                                          This parameter can be a value of @ref SPI_MSB_LSB_transmission */
00078 
00079   uint16_t SPI_CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation. */
00080 }SPI_InitTypeDef;
00081 
00082 /** 
00083   * @brief  I2S Init structure definition  
00084   */
00085 
00086 typedef struct
00087 {
00088 
00089   uint16_t I2S_Mode;         /*!< Specifies the I2S operating mode.
00090                                   This parameter can be a value of @ref I2S_Mode */
00091 
00092   uint16_t I2S_Standard;     /*!< Specifies the standard used for the I2S communication.
00093                                   This parameter can be a value of @ref I2S_Standard */
00094 
00095   uint16_t I2S_DataFormat;   /*!< Specifies the data format for the I2S communication.
00096                                   This parameter can be a value of @ref I2S_Data_Format */
00097 
00098   uint16_t I2S_MCLKOutput;   /*!< Specifies whether the I2S MCLK output is enabled or not.
00099                                   This parameter can be a value of @ref I2S_MCLK_Output */
00100 
00101   uint32_t I2S_AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
00102                                   This parameter can be a value of @ref I2S_Audio_Frequency */
00103 
00104   uint16_t I2S_CPOL;         /*!< Specifies the idle state of the I2S clock.
00105                                   This parameter can be a value of @ref I2S_Clock_Polarity */
00106 }I2S_InitTypeDef;
00107 
00108 /**
00109   * @}
00110   */
00111 
00112 /** @defgroup SPI_Exported_Constants
00113   * @{
00114   */
00115 
00116 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
00117                                    ((PERIPH) == SPI2) || \
00118                                    ((PERIPH) == SPI3))
00119 
00120 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
00121                                   ((PERIPH) == SPI3))
00122 
00123 /** @defgroup SPI_data_direction 
00124   * @{
00125   */
00126   
00127 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
00128 #define SPI_Direction_2Lines_RxOnly     ((uint16_t)0x0400)
00129 #define SPI_Direction_1Line_Rx          ((uint16_t)0x8000)
00130 #define SPI_Direction_1Line_Tx          ((uint16_t)0xC000)
00131 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
00132                                      ((MODE) == SPI_Direction_2Lines_RxOnly) || \
00133                                      ((MODE) == SPI_Direction_1Line_Rx) || \
00134                                      ((MODE) == SPI_Direction_1Line_Tx))
00135 /**
00136   * @}
00137   */
00138 
00139 /** @defgroup SPI_mode 
00140   * @{
00141   */
00142 
00143 #define SPI_Mode_Master                 ((uint16_t)0x0104)
00144 #define SPI_Mode_Slave                  ((uint16_t)0x0000)
00145 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
00146                            ((MODE) == SPI_Mode_Slave))
00147 /**
00148   * @}
00149   */
00150 
00151 /** @defgroup SPI_data_size 
00152   * @{
00153   */
00154 
00155 #define SPI_DataSize_16b                ((uint16_t)0x0800)
00156 #define SPI_DataSize_8b                 ((uint16_t)0x0000)
00157 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
00158                                    ((DATASIZE) == SPI_DataSize_8b))
00159 /**
00160   * @}
00161   */ 
00162 
00163 /** @defgroup SPI_Clock_Polarity 
00164   * @{
00165   */
00166 
00167 #define SPI_CPOL_Low                    ((uint16_t)0x0000)
00168 #define SPI_CPOL_High                   ((uint16_t)0x0002)
00169 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
00170                            ((CPOL) == SPI_CPOL_High))
00171 /**
00172   * @}
00173   */
00174 
00175 /** @defgroup SPI_Clock_Phase 
00176   * @{
00177   */
00178 
00179 #define SPI_CPHA_1Edge                  ((uint16_t)0x0000)
00180 #define SPI_CPHA_2Edge                  ((uint16_t)0x0001)
00181 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
00182                            ((CPHA) == SPI_CPHA_2Edge))
00183 /**
00184   * @}
00185   */
00186 
00187 /** @defgroup SPI_Slave_Select_management 
00188   * @{
00189   */
00190 
00191 #define SPI_NSS_Soft                    ((uint16_t)0x0200)
00192 #define SPI_NSS_Hard                    ((uint16_t)0x0000)
00193 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
00194                          ((NSS) == SPI_NSS_Hard))
00195 /**
00196   * @}
00197   */ 
00198 
00199 /** @defgroup SPI_BaudRate_Prescaler 
00200   * @{
00201   */
00202 
00203 #define SPI_BaudRatePrescaler_2         ((uint16_t)0x0000)
00204 #define SPI_BaudRatePrescaler_4         ((uint16_t)0x0008)
00205 #define SPI_BaudRatePrescaler_8         ((uint16_t)0x0010)
00206 #define SPI_BaudRatePrescaler_16        ((uint16_t)0x0018)
00207 #define SPI_BaudRatePrescaler_32        ((uint16_t)0x0020)
00208 #define SPI_BaudRatePrescaler_64        ((uint16_t)0x0028)
00209 #define SPI_BaudRatePrescaler_128       ((uint16_t)0x0030)
00210 #define SPI_BaudRatePrescaler_256       ((uint16_t)0x0038)
00211 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
00212                                               ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
00213                                               ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
00214                                               ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
00215                                               ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
00216                                               ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
00217                                               ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
00218                                               ((PRESCALER) == SPI_BaudRatePrescaler_256))
00219 /**
00220   * @}
00221   */ 
00222 
00223 /** @defgroup SPI_MSB_LSB_transmission 
00224   * @{
00225   */
00226 
00227 #define SPI_FirstBit_MSB                ((uint16_t)0x0000)
00228 #define SPI_FirstBit_LSB                ((uint16_t)0x0080)
00229 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
00230                                ((BIT) == SPI_FirstBit_LSB))
00231 /**
00232   * @}
00233   */
00234 
00235 /** @defgroup I2S_Mode 
00236   * @{
00237   */
00238 
00239 #define I2S_Mode_SlaveTx                ((uint16_t)0x0000)
00240 #define I2S_Mode_SlaveRx                ((uint16_t)0x0100)
00241 #define I2S_Mode_MasterTx               ((uint16_t)0x0200)
00242 #define I2S_Mode_MasterRx               ((uint16_t)0x0300)
00243 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
00244                            ((MODE) == I2S_Mode_SlaveRx) || \
00245                            ((MODE) == I2S_Mode_MasterTx) || \
00246                            ((MODE) == I2S_Mode_MasterRx) )
00247 /**
00248   * @}
00249   */
00250 
00251 /** @defgroup I2S_Standard 
00252   * @{
00253   */
00254 
00255 #define I2S_Standard_Phillips           ((uint16_t)0x0000)
00256 #define I2S_Standard_MSB                ((uint16_t)0x0010)
00257 #define I2S_Standard_LSB                ((uint16_t)0x0020)
00258 #define I2S_Standard_PCMShort           ((uint16_t)0x0030)
00259 #define I2S_Standard_PCMLong            ((uint16_t)0x00B0)
00260 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
00261                                    ((STANDARD) == I2S_Standard_MSB) || \
00262                                    ((STANDARD) == I2S_Standard_LSB) || \
00263                                    ((STANDARD) == I2S_Standard_PCMShort) || \
00264                                    ((STANDARD) == I2S_Standard_PCMLong))
00265 /**
00266   * @}
00267   */
00268 
00269 /** @defgroup I2S_Data_Format 
00270   * @{
00271   */
00272 
00273 #define I2S_DataFormat_16b              ((uint16_t)0x0000)
00274 #define I2S_DataFormat_16bextended      ((uint16_t)0x0001)
00275 #define I2S_DataFormat_24b              ((uint16_t)0x0003)
00276 #define I2S_DataFormat_32b              ((uint16_t)0x0005)
00277 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
00278                                     ((FORMAT) == I2S_DataFormat_16bextended) || \
00279                                     ((FORMAT) == I2S_DataFormat_24b) || \
00280                                     ((FORMAT) == I2S_DataFormat_32b))
00281 /**
00282   * @}
00283   */ 
00284 
00285 /** @defgroup I2S_MCLK_Output 
00286   * @{
00287   */
00288 
00289 #define I2S_MCLKOutput_Enable           ((uint16_t)0x0200)
00290 #define I2S_MCLKOutput_Disable          ((uint16_t)0x0000)
00291 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
00292                                     ((OUTPUT) == I2S_MCLKOutput_Disable))
00293 /**
00294   * @}
00295   */
00296 
00297 /** @defgroup I2S_Audio_Frequency 
00298   * @{
00299   */
00300 
00301 #define I2S_AudioFreq_192k               ((uint32_t)192000)
00302 #define I2S_AudioFreq_96k                ((uint32_t)96000)
00303 #define I2S_AudioFreq_48k                ((uint32_t)48000)
00304 #define I2S_AudioFreq_44k                ((uint32_t)44100)
00305 #define I2S_AudioFreq_32k                ((uint32_t)32000)
00306 #define I2S_AudioFreq_22k                ((uint32_t)22050)
00307 #define I2S_AudioFreq_16k                ((uint32_t)16000)
00308 #define I2S_AudioFreq_11k                ((uint32_t)11025)
00309 #define I2S_AudioFreq_8k                 ((uint32_t)8000)
00310 #define I2S_AudioFreq_Default            ((uint32_t)2)
00311 
00312 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
00313                                   ((FREQ) <= I2S_AudioFreq_192k)) || \
00314                                  ((FREQ) == I2S_AudioFreq_Default))
00315 /**
00316   * @}
00317   */ 
00318 
00319 /** @defgroup I2S_Clock_Polarity 
00320   * @{
00321   */
00322 
00323 #define I2S_CPOL_Low                    ((uint16_t)0x0000)
00324 #define I2S_CPOL_High                   ((uint16_t)0x0008)
00325 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
00326                            ((CPOL) == I2S_CPOL_High))
00327 /**
00328   * @}
00329   */
00330 
00331 /** @defgroup SPI_I2S_DMA_transfer_requests 
00332   * @{
00333   */
00334 
00335 #define SPI_I2S_DMAReq_Tx               ((uint16_t)0x0002)
00336 #define SPI_I2S_DMAReq_Rx               ((uint16_t)0x0001)
00337 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
00338 /**
00339   * @}
00340   */
00341 
00342 /** @defgroup SPI_NSS_internal_software_mangement 
00343   * @{
00344   */
00345 
00346 #define SPI_NSSInternalSoft_Set         ((uint16_t)0x0100)
00347 #define SPI_NSSInternalSoft_Reset       ((uint16_t)0xFEFF)
00348 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
00349                                        ((INTERNAL) == SPI_NSSInternalSoft_Reset))
00350 /**
00351   * @}
00352   */
00353 
00354 /** @defgroup SPI_CRC_Transmit_Receive 
00355   * @{
00356   */
00357 
00358 #define SPI_CRC_Tx                      ((uint8_t)0x00)
00359 #define SPI_CRC_Rx                      ((uint8_t)0x01)
00360 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
00361 /**
00362   * @}
00363   */
00364 
00365 /** @defgroup SPI_direction_transmit_receive 
00366   * @{
00367   */
00368 
00369 #define SPI_Direction_Rx                ((uint16_t)0xBFFF)
00370 #define SPI_Direction_Tx                ((uint16_t)0x4000)
00371 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
00372                                      ((DIRECTION) == SPI_Direction_Tx))
00373 /**
00374   * @}
00375   */
00376 
00377 /** @defgroup SPI_I2S_interrupts_definition 
00378   * @{
00379   */
00380 
00381 #define SPI_I2S_IT_TXE                  ((uint8_t)0x71)
00382 #define SPI_I2S_IT_RXNE                 ((uint8_t)0x60)
00383 #define SPI_I2S_IT_ERR                  ((uint8_t)0x50)
00384 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
00385                                  ((IT) == SPI_I2S_IT_RXNE) || \
00386                                  ((IT) == SPI_I2S_IT_ERR))
00387 #define SPI_I2S_IT_OVR                  ((uint8_t)0x56)
00388 #define SPI_IT_MODF                     ((uint8_t)0x55)
00389 #define SPI_IT_CRCERR                   ((uint8_t)0x54)
00390 #define I2S_IT_UDR                      ((uint8_t)0x53)
00391 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
00392 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
00393                                ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
00394                                ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
00395 /**
00396   * @}
00397   */
00398 
00399 /** @defgroup SPI_I2S_flags_definition 
00400   * @{
00401   */
00402 
00403 #define SPI_I2S_FLAG_RXNE               ((uint16_t)0x0001)
00404 #define SPI_I2S_FLAG_TXE                ((uint16_t)0x0002)
00405 #define I2S_FLAG_CHSIDE                 ((uint16_t)0x0004)
00406 #define I2S_FLAG_UDR                    ((uint16_t)0x0008)
00407 #define SPI_FLAG_CRCERR                 ((uint16_t)0x0010)
00408 #define SPI_FLAG_MODF                   ((uint16_t)0x0020)
00409 #define SPI_I2S_FLAG_OVR                ((uint16_t)0x0040)
00410 #define SPI_I2S_FLAG_BSY                ((uint16_t)0x0080)
00411 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
00412 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
00413                                    ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
00414                                    ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
00415                                    ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
00416 /**
00417   * @}
00418   */
00419 
00420 /** @defgroup SPI_CRC_polynomial 
00421   * @{
00422   */
00423 
00424 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
00425 /**
00426   * @}
00427   */
00428 
00429 /**
00430   * @}
00431   */
00432 
00433 /** @defgroup SPI_Exported_Macros
00434   * @{
00435   */
00436 
00437 /**
00438   * @}
00439   */
00440 
00441 /** @defgroup SPI_Exported_Functions
00442   * @{
00443   */
00444 
00445 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
00446 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
00447 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
00448 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
00449 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
00450 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
00451 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
00452 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
00453 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
00454 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
00455 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
00456 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
00457 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
00458 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
00459 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
00460 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
00461 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
00462 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
00463 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
00464 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
00465 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
00466 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
00467 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
00468 
00469 #ifdef __cplusplus
00470 }
00471 #endif
00472 
00473 #endif /*__STM32F10x_SPI_H */
00474 /**
00475   * @}
00476   */
00477 
00478 /**
00479   * @}
00480   */
00481 
00482 /**
00483   * @}
00484   */
00485 
00486 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

      For complete documentation on STM32(CORTEX M3) 32-bit Microcontrollers platform visit  www.st.com/STM32