stm32f10x_iwdg.c

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_iwdg.c
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file provides all the IWDG firmware functions.
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x_iwdg.h"
00023 
00024 /** @addtogroup STM32F10x_StdPeriph_Driver
00025   * @{
00026   */
00027 
00028 /** @defgroup IWDG 
00029   * @brief IWDG driver modules
00030   * @{
00031   */ 
00032 
00033 /** @defgroup IWDG_Private_TypesDefinitions
00034   * @{
00035   */
00036 
00037 /**
00038   * @}
00039   */
00040 
00041 /** @defgroup IWDG_Private_Defines
00042   * @{
00043   */ 
00044 
00045 /* ---------------------- IWDG registers bit mask ----------------------------*/
00046 
00047 /* KR register bit mask */
00048 #define KR_KEY_Reload    ((uint16_t)0xAAAA)
00049 #define KR_KEY_Enable    ((uint16_t)0xCCCC)
00050 
00051 /**
00052   * @}
00053   */ 
00054 
00055 /** @defgroup IWDG_Private_Macros
00056   * @{
00057   */
00058 
00059 /**
00060   * @}
00061   */
00062 
00063 /** @defgroup IWDG_Private_Variables
00064   * @{
00065   */
00066 
00067 /**
00068   * @}
00069   */
00070 
00071 /** @defgroup IWDG_Private_FunctionPrototypes
00072   * @{
00073   */
00074 
00075 /**
00076   * @}
00077   */
00078 
00079 /** @defgroup IWDG_Private_Functions
00080   * @{
00081   */
00082 
00083 /**
00084   * @brief  Enables or disables write access to IWDG_PR and IWDG_RLR registers.
00085   * @param  IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
00086   *   This parameter can be one of the following values:
00087   *     @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
00088   *     @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
00089   * @retval None
00090   */
00091 void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
00092 {
00093   /* Check the parameters */
00094   assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess));
00095   IWDG->KR = IWDG_WriteAccess;
00096 }
00097 
00098 /**
00099   * @brief  Sets IWDG Prescaler value.
00100   * @param  IWDG_Prescaler: specifies the IWDG Prescaler value.
00101   *   This parameter can be one of the following values:
00102   *     @arg IWDG_Prescaler_4: IWDG prescaler set to 4
00103   *     @arg IWDG_Prescaler_8: IWDG prescaler set to 8
00104   *     @arg IWDG_Prescaler_16: IWDG prescaler set to 16
00105   *     @arg IWDG_Prescaler_32: IWDG prescaler set to 32
00106   *     @arg IWDG_Prescaler_64: IWDG prescaler set to 64
00107   *     @arg IWDG_Prescaler_128: IWDG prescaler set to 128
00108   *     @arg IWDG_Prescaler_256: IWDG prescaler set to 256
00109   * @retval None
00110   */
00111 void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
00112 {
00113   /* Check the parameters */
00114   assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler));
00115   IWDG->PR = IWDG_Prescaler;
00116 }
00117 
00118 /**
00119   * @brief  Sets IWDG Reload value.
00120   * @param  Reload: specifies the IWDG Reload value.
00121   *   This parameter must be a number between 0 and 0x0FFF.
00122   * @retval None
00123   */
00124 void IWDG_SetReload(uint16_t Reload)
00125 {
00126   /* Check the parameters */
00127   assert_param(IS_IWDG_RELOAD(Reload));
00128   IWDG->RLR = Reload;
00129 }
00130 
00131 /**
00132   * @brief  Reloads IWDG counter with value defined in the reload register
00133   *   (write access to IWDG_PR and IWDG_RLR registers disabled).
00134   * @param  None
00135   * @retval None
00136   */
00137 void IWDG_ReloadCounter(void)
00138 {
00139   IWDG->KR = KR_KEY_Reload;
00140 }
00141 
00142 /**
00143   * @brief  Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
00144   * @param  None
00145   * @retval None
00146   */
00147 void IWDG_Enable(void)
00148 {
00149   IWDG->KR = KR_KEY_Enable;
00150 }
00151 
00152 /**
00153   * @brief  Checks whether the specified IWDG flag is set or not.
00154   * @param  IWDG_FLAG: specifies the flag to check.
00155   *   This parameter can be one of the following values:
00156   *     @arg IWDG_FLAG_PVU: Prescaler Value Update on going
00157   *     @arg IWDG_FLAG_RVU: Reload Value Update on going
00158   * @retval The new state of IWDG_FLAG (SET or RESET).
00159   */
00160 FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG)
00161 {
00162   FlagStatus bitstatus = RESET;
00163   /* Check the parameters */
00164   assert_param(IS_IWDG_FLAG(IWDG_FLAG));
00165   if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
00166   {
00167     bitstatus = SET;
00168   }
00169   else
00170   {
00171     bitstatus = RESET;
00172   }
00173   /* Return the flag status */
00174   return bitstatus;
00175 }
00176 
00177 /**
00178   * @}
00179   */
00180 
00181 /**
00182   * @}
00183   */
00184 
00185 /**
00186   * @}
00187   */
00188 
00189 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

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