stm32f10x_i2c.h

Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_i2c.h
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file contains all the functions prototypes for the I2C firmware 
00008   *          library.
00009   ******************************************************************************
00010   * @copy
00011   *
00012   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00013   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00014   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00015   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00016   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00017   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00018   *
00019   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00020   */ 
00021 
00022 /* Define to prevent recursive inclusion -------------------------------------*/
00023 #ifndef __STM32F10x_I2C_H
00024 #define __STM32F10x_I2C_H
00025 
00026 #ifdef __cplusplus
00027  extern "C" {
00028 #endif
00029 
00030 /* Includes ------------------------------------------------------------------*/
00031 #include "stm32f10x.h"
00032 
00033 /** @addtogroup STM32F10x_StdPeriph_Driver
00034   * @{
00035   */
00036 
00037 /** @addtogroup I2C
00038   * @{
00039   */
00040 
00041 /** @defgroup I2C_Exported_Types
00042   * @{
00043   */
00044 
00045 /** 
00046   * @brief  I2C Init structure definition  
00047   */
00048 
00049 typedef struct
00050 {
00051   uint32_t I2C_ClockSpeed;          /*!< Specifies the clock frequency.
00052                                          This parameter must be set to a value lower than 400kHz */
00053 
00054   uint16_t I2C_Mode;                /*!< Specifies the I2C mode.
00055                                          This parameter can be a value of @ref I2C_mode */
00056 
00057   uint16_t I2C_DutyCycle;           /*!< Specifies the I2C fast mode duty cycle.
00058                                          This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
00059 
00060   uint16_t I2C_OwnAddress1;         /*!< Specifies the first device own address.
00061                                          This parameter can be a 7-bit or 10-bit address. */
00062 
00063   uint16_t I2C_Ack;                 /*!< Enables or disables the acknowledgement.
00064                                          This parameter can be a value of @ref I2C_acknowledgement */
00065 
00066   uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
00067                                          This parameter can be a value of @ref I2C_acknowledged_address */
00068 }I2C_InitTypeDef;
00069 
00070 /**
00071   * @}
00072   */ 
00073 
00074 
00075 /** @defgroup I2C_Exported_Constants
00076   * @{
00077   */
00078 
00079 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
00080                                    ((PERIPH) == I2C2))
00081 /** @defgroup I2C_mode 
00082   * @{
00083   */
00084 
00085 #define I2C_Mode_I2C                    ((uint16_t)0x0000)
00086 #define I2C_Mode_SMBusDevice            ((uint16_t)0x0002)  
00087 #define I2C_Mode_SMBusHost              ((uint16_t)0x000A)
00088 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
00089                            ((MODE) == I2C_Mode_SMBusDevice) || \
00090                            ((MODE) == I2C_Mode_SMBusHost))
00091 /**
00092   * @}
00093   */
00094 
00095 /** @defgroup I2C_duty_cycle_in_fast_mode 
00096   * @{
00097   */
00098 
00099 #define I2C_DutyCycle_16_9              ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
00100 #define I2C_DutyCycle_2                 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
00101 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
00102                                   ((CYCLE) == I2C_DutyCycle_2))
00103 /**
00104   * @}
00105   */ 
00106 
00107 /** @defgroup I2C_acknowledgement
00108   * @{
00109   */
00110 
00111 #define I2C_Ack_Enable                  ((uint16_t)0x0400)
00112 #define I2C_Ack_Disable                 ((uint16_t)0x0000)
00113 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
00114                                  ((STATE) == I2C_Ack_Disable))
00115 /**
00116   * @}
00117   */
00118 
00119 /** @defgroup I2C_transfer_direction 
00120   * @{
00121   */
00122 
00123 #define  I2C_Direction_Transmitter      ((uint8_t)0x00)
00124 #define  I2C_Direction_Receiver         ((uint8_t)0x01)
00125 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
00126                                      ((DIRECTION) == I2C_Direction_Receiver))
00127 /**
00128   * @}
00129   */
00130 
00131 /** @defgroup I2C_acknowledged_address 
00132   * @{
00133   */
00134 
00135 #define I2C_AcknowledgedAddress_7bit    ((uint16_t)0x4000)
00136 #define I2C_AcknowledgedAddress_10bit   ((uint16_t)0xC000)
00137 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
00138                                              ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
00139 /**
00140   * @}
00141   */ 
00142 
00143 /** @defgroup I2C_registers 
00144   * @{
00145   */
00146 
00147 #define I2C_Register_CR1                ((uint8_t)0x00)
00148 #define I2C_Register_CR2                ((uint8_t)0x04)
00149 #define I2C_Register_OAR1               ((uint8_t)0x08)
00150 #define I2C_Register_OAR2               ((uint8_t)0x0C)
00151 #define I2C_Register_DR                 ((uint8_t)0x10)
00152 #define I2C_Register_SR1                ((uint8_t)0x14)
00153 #define I2C_Register_SR2                ((uint8_t)0x18)
00154 #define I2C_Register_CCR                ((uint8_t)0x1C)
00155 #define I2C_Register_TRISE              ((uint8_t)0x20)
00156 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
00157                                    ((REGISTER) == I2C_Register_CR2) || \
00158                                    ((REGISTER) == I2C_Register_OAR1) || \
00159                                    ((REGISTER) == I2C_Register_OAR2) || \
00160                                    ((REGISTER) == I2C_Register_DR) || \
00161                                    ((REGISTER) == I2C_Register_SR1) || \
00162                                    ((REGISTER) == I2C_Register_SR2) || \
00163                                    ((REGISTER) == I2C_Register_CCR) || \
00164                                    ((REGISTER) == I2C_Register_TRISE))
00165 /**
00166   * @}
00167   */
00168 
00169 /** @defgroup I2C_SMBus_alert_pin_level 
00170   * @{
00171   */
00172 
00173 #define I2C_SMBusAlert_Low              ((uint16_t)0x2000)
00174 #define I2C_SMBusAlert_High             ((uint16_t)0xDFFF)
00175 #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
00176                                    ((ALERT) == I2C_SMBusAlert_High))
00177 /**
00178   * @}
00179   */
00180 
00181 /** @defgroup I2C_PEC_position 
00182   * @{
00183   */
00184 
00185 #define I2C_PECPosition_Next            ((uint16_t)0x0800)
00186 #define I2C_PECPosition_Current         ((uint16_t)0xF7FF)
00187 #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
00188                                        ((POSITION) == I2C_PECPosition_Current))
00189 /**
00190   * @}
00191   */ 
00192 
00193 /** @defgroup I2C_interrupts_definition 
00194   * @{
00195   */
00196 
00197 #define I2C_IT_BUF                      ((uint16_t)0x0400)
00198 #define I2C_IT_EVT                      ((uint16_t)0x0200)
00199 #define I2C_IT_ERR                      ((uint16_t)0x0100)
00200 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
00201 /**
00202   * @}
00203   */ 
00204 
00205 /** @defgroup I2C_interrupts_definition 
00206   * @{
00207   */
00208 
00209 #define I2C_IT_SMBALERT                 ((uint32_t)0x01008000)
00210 #define I2C_IT_TIMEOUT                  ((uint32_t)0x01004000)
00211 #define I2C_IT_PECERR                   ((uint32_t)0x01001000)
00212 #define I2C_IT_OVR                      ((uint32_t)0x01000800)
00213 #define I2C_IT_AF                       ((uint32_t)0x01000400)
00214 #define I2C_IT_ARLO                     ((uint32_t)0x01000200)
00215 #define I2C_IT_BERR                     ((uint32_t)0x01000100)
00216 #define I2C_IT_TXE                      ((uint32_t)0x06000080)
00217 #define I2C_IT_RXNE                     ((uint32_t)0x06000040)
00218 #define I2C_IT_STOPF                    ((uint32_t)0x02000010)
00219 #define I2C_IT_ADD10                    ((uint32_t)0x02000008)
00220 #define I2C_IT_BTF                      ((uint32_t)0x02000004)
00221 #define I2C_IT_ADDR                     ((uint32_t)0x02000002)
00222 #define I2C_IT_SB                       ((uint32_t)0x02000001)
00223 
00224 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
00225 
00226 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
00227                            ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
00228                            ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
00229                            ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
00230                            ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
00231                            ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
00232                            ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
00233 /**
00234   * @}
00235   */
00236 
00237 /** @defgroup I2C_flags_definition 
00238   * @{
00239   */
00240 
00241 /** 
00242   * @brief  SR2 register flags  
00243   */
00244 
00245 #define I2C_FLAG_DUALF                  ((uint32_t)0x00800000)
00246 #define I2C_FLAG_SMBHOST                ((uint32_t)0x00400000)
00247 #define I2C_FLAG_SMBDEFAULT             ((uint32_t)0x00200000)
00248 #define I2C_FLAG_GENCALL                ((uint32_t)0x00100000)
00249 #define I2C_FLAG_TRA                    ((uint32_t)0x00040000)
00250 #define I2C_FLAG_BUSY                   ((uint32_t)0x00020000)
00251 #define I2C_FLAG_MSL                    ((uint32_t)0x00010000)
00252 
00253 /** 
00254   * @brief  SR1 register flags  
00255   */
00256 
00257 #define I2C_FLAG_SMBALERT               ((uint32_t)0x10008000)
00258 #define I2C_FLAG_TIMEOUT                ((uint32_t)0x10004000)
00259 #define I2C_FLAG_PECERR                 ((uint32_t)0x10001000)
00260 #define I2C_FLAG_OVR                    ((uint32_t)0x10000800)
00261 #define I2C_FLAG_AF                     ((uint32_t)0x10000400)
00262 #define I2C_FLAG_ARLO                   ((uint32_t)0x10000200)
00263 #define I2C_FLAG_BERR                   ((uint32_t)0x10000100)
00264 #define I2C_FLAG_TXE                    ((uint32_t)0x10000080)
00265 #define I2C_FLAG_RXNE                   ((uint32_t)0x10000040)
00266 #define I2C_FLAG_STOPF                  ((uint32_t)0x10000010)
00267 #define I2C_FLAG_ADD10                  ((uint32_t)0x10000008)
00268 #define I2C_FLAG_BTF                    ((uint32_t)0x10000004)
00269 #define I2C_FLAG_ADDR                   ((uint32_t)0x10000002)
00270 #define I2C_FLAG_SB                     ((uint32_t)0x10000001)
00271 
00272 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
00273 
00274 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
00275                                ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
00276                                ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
00277                                ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
00278                                ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
00279                                ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
00280                                ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
00281                                ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
00282                                ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
00283                                ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
00284                                ((FLAG) == I2C_FLAG_SB))
00285 /**
00286   * @}
00287   */
00288 
00289 /** @defgroup I2C_Events 
00290   * @{
00291   */
00292 
00293 /*========================================
00294      
00295                      I2C Master Events (Events grouped in order of communication)
00296                                                         ==========================================*/
00297 /** 
00298   * @brief  Communication start
00299   * 
00300   * After sending the START condition (I2C_GenerateSTART() function) the master 
00301   * has to wait for this event. It means that the Start condition has been correctly 
00302   * released on the I2C bus (the bus is free, no other devices is communicating).
00303   * 
00304   */
00305 /* --EV5 */
00306 #define  I2C_EVENT_MASTER_MODE_SELECT                      ((uint32_t)0x00030001)  /* BUSY, MSL and SB flag */
00307 
00308 /** 
00309   * @brief  Address Acknowledge
00310   * 
00311   * After checking on EV5 (start condition correctly released on the bus), the 
00312   * master sends the address of the slave(s) with which it will communicate 
00313   * (I2C_Send7bitAddress() function, it also determines the direction of the communication: 
00314   * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges 
00315   * his address. If an acknowledge is sent on the bus, one of the following events will 
00316   * be set:
00317   * 
00318   *  1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED 
00319   *     event is set.
00320   *  
00321   *  2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED 
00322   *     is set
00323   *  
00324   *  3) In case of 10-Bit addressing mode, the master (just after generating the START 
00325   *  and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() 
00326   *  function). Then master should wait on EV9. It means that the 10-bit addressing 
00327   *  header has been correctly sent on the bus. Then master should send the second part of 
00328   *  the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master 
00329   *  should wait for event EV6. 
00330   *     
00331   */
00332 
00333 /* --EV6 */
00334 #define  I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED        ((uint32_t)0x00070082)  /* BUSY, MSL, ADDR, TXE and TRA flags */
00335 #define  I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED           ((uint32_t)0x00030002)  /* BUSY, MSL and ADDR flags */
00336 /* --EV9 */
00337 #define  I2C_EVENT_MASTER_MODE_ADDRESS10                   ((uint32_t)0x00030008)  /* BUSY, MSL and ADD10 flags */
00338 
00339 /** 
00340   * @brief Communication events
00341   * 
00342   * If a communication is established (START condition generated and slave address 
00343   * acknowledged) then the master has to check on one of the following events for 
00344   * communication procedures:
00345   *  
00346   * 1) Master Receiver mode: The master has to wait on the event EV7 then to read 
00347   *    the data received from the slave (I2C_ReceiveData() function).
00348   * 
00349   * 2) Master Transmitter mode: The master has to send data (I2C_SendData() 
00350   *    function) then to wait on event EV8 or EV8_2.
00351   *    These two events are similar: 
00352   *     - EV8 means that the data has been written in the data register and is 
00353   *       being shifted out.
00354   *     - EV8_2 means that the data has been physically shifted out and output 
00355   *       on the bus.
00356   *     In most cases, using EV8 is sufficient for the application.
00357   *     Using EV8_2 leads to a slower communication but ensure more reliable test.
00358   *     EV8_2 is also more suitable than EV8 for testing on the last data transmission 
00359   *     (before Stop condition generation).
00360   *     
00361   *  @note In case the  user software does not guarantee that this event EV7 is 
00362   *  managed before the current byte end of transfer, then user may check on EV7 
00363   *  and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
00364   *  In this case the communication may be slower.
00365   * 
00366   */
00367 
00368 /* Master RECEIVER mode -----------------------------*/ 
00369 /* --EV7 */
00370 #define  I2C_EVENT_MASTER_BYTE_RECEIVED                    ((uint32_t)0x00030040)  /* BUSY, MSL and RXNE flags */
00371 
00372 /* Master TRANSMITTER mode --------------------------*/
00373 /* --EV8 */
00374 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING                 ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
00375 /* --EV8_2 */
00376 #define  I2C_EVENT_MASTER_BYTE_TRANSMITTED                 ((uint32_t)0x00070084)  /* TRA, BUSY, MSL, TXE and BTF flags */
00377 
00378 
00379 /*========================================
00380      
00381                      I2C Slave Events (Events grouped in order of communication)
00382                                                         ==========================================*/
00383 
00384 /** 
00385   * @brief  Communication start events
00386   * 
00387   * Wait on one of these events at the start of the communication. It means that 
00388   * the I2C peripheral detected a Start condition on the bus (generated by master 
00389   * device) followed by the peripheral address. The peripheral generates an ACK 
00390   * condition on the bus (if the acknowledge feature is enabled through function 
00391   * I2C_AcknowledgeConfig()) and the events listed above are set :
00392   *  
00393   * 1) In normal case (only one address managed by the slave), when the address 
00394   *   sent by the master matches the own address of the peripheral (configured by 
00395   *   I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set 
00396   *   (where XXX could be TRANSMITTER or RECEIVER).
00397   *    
00398   * 2) In case the address sent by the master matches the second address of the 
00399   *   peripheral (configured by the function I2C_OwnAddress2Config() and enabled 
00400   *   by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED 
00401   *   (where XXX could be TRANSMITTER or RECEIVER) are set.
00402   *   
00403   * 3) In case the address sent by the master is General Call (address 0x00) and 
00404   *   if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) 
00405   *   the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.   
00406   * 
00407   */
00408 
00409 /* --EV1  (all the events below are variants of EV1) */   
00410 /* 1) Case of One Single Address managed by the slave */
00411 #define  I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED          ((uint32_t)0x00020002) /* BUSY and ADDR flags */
00412 #define  I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED       ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
00413 
00414 /* 2) Case of Dual address managed by the slave */
00415 #define  I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED    ((uint32_t)0x00820000)  /* DUALF and BUSY flags */
00416 #define  I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080)  /* DUALF, TRA, BUSY and TXE flags */
00417 
00418 /* 3) Case of General Call enabled for the slave */
00419 #define  I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED        ((uint32_t)0x00120000)  /* GENCALL and BUSY flags */
00420 
00421 /** 
00422   * @brief  Communication events
00423   * 
00424   * Wait on one of these events when EV1 has already been checked and: 
00425   * 
00426   * - Slave RECEIVER mode:
00427   *     - EV2: When the application is expecting a data byte to be received. 
00428   *     - EV4: When the application is expecting the end of the communication: master 
00429   *       sends a stop condition and data transmission is stopped.
00430   *    
00431   * - Slave Transmitter mode:
00432   *    - EV3: When a byte has been transmitted by the slave and the application is expecting 
00433   *      the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
00434   *      I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be 
00435   *      used when the user software doesn't guarantee the EV3 is managed before the
00436   *      current byte end of tranfer.
00437   *    - EV3_2: When the master sends a NACK in order to tell slave that data transmission 
00438   *      shall end (before sending the STOP condition). In this case slave has to stop sending 
00439   *      data bytes and expect a Stop condition on the bus.
00440   *      
00441   *  @note In case the  user software does not guarantee that the event EV2 is 
00442   *  managed before the current byte end of transfer, then user may check on EV2 
00443   *  and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
00444   * In this case the communication may be slower.
00445   *
00446   */
00447 
00448 /* Slave RECEIVER mode --------------------------*/ 
00449 /* --EV2 */
00450 #define  I2C_EVENT_SLAVE_BYTE_RECEIVED                     ((uint32_t)0x00020040)  /* BUSY and RXNE flags */
00451 /* --EV4  */
00452 #define  I2C_EVENT_SLAVE_STOP_DETECTED                     ((uint32_t)0x00000010)  /* STOPF flag */
00453 
00454 /* Slave TRANSMITTER mode -----------------------*/
00455 /* --EV3 */
00456 #define  I2C_EVENT_SLAVE_BYTE_TRANSMITTED                  ((uint32_t)0x00060084)  /* TRA, BUSY, TXE and BTF flags */
00457 #define  I2C_EVENT_SLAVE_BYTE_TRANSMITTING                 ((uint32_t)0x00060080)  /* TRA, BUSY and TXE flags */
00458 /* --EV3_2 */
00459 #define  I2C_EVENT_SLAVE_ACK_FAILURE                       ((uint32_t)0x00000400)  /* AF flag */
00460 
00461 /*===========================      End of Events Description           ==========================================*/
00462 
00463 #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
00464                              ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
00465                              ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
00466                              ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
00467                              ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
00468                              ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
00469                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
00470                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
00471                              ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
00472                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
00473                              ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
00474                              ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
00475                              ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
00476                              ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
00477                              ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
00478                              ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
00479                              ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
00480                              ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
00481                              ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
00482                              ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
00483 /**
00484   * @}
00485   */
00486 
00487 /** @defgroup I2C_own_address1 
00488   * @{
00489   */
00490 
00491 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
00492 /**
00493   * @}
00494   */
00495 
00496 /** @defgroup I2C_clock_speed 
00497   * @{
00498   */
00499 
00500 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
00501 /**
00502   * @}
00503   */
00504 
00505 /**
00506   * @}
00507   */
00508 
00509 /** @defgroup I2C_Exported_Macros
00510   * @{
00511   */
00512 
00513 /**
00514   * @}
00515   */
00516 
00517 /** @defgroup I2C_Exported_Functions
00518   * @{
00519   */
00520 
00521 void I2C_DeInit(I2C_TypeDef* I2Cx);
00522 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
00523 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
00524 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00525 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00526 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00527 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
00528 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
00529 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
00530 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
00531 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00532 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00533 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
00534 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
00535 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
00536 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
00537 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
00538 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00539 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
00540 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
00541 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
00542 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
00543 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
00544 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00545 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
00546 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
00547 
00548 /**
00549  * @brief
00550  ****************************************************************************************
00551  *
00552  *                         I2C State Monitoring Functions
00553  *                       
00554  ****************************************************************************************   
00555  * This I2C driver provides three different ways for I2C state monitoring
00556  *  depending on the application requirements and constraints:
00557  *        
00558  *  
00559  * 1) Basic state monitoring:
00560  *    Using I2C_CheckEvent() function:
00561  *    It compares the status registers (SR1 and SR2) content to a given event
00562  *    (can be the combination of one or more flags).
00563  *    It returns SUCCESS if the current status includes the given flags 
00564  *    and returns ERROR if one or more flags are missing in the current status.
00565  *    - When to use:
00566  *      - This function is suitable for most applications as well as for startup 
00567  *      activity since the events are fully described in the product reference manual 
00568  *      (RM0008).
00569  *      - It is also suitable for users who need to define their own events.
00570  *    - Limitations:
00571  *      - If an error occurs (ie. error flags are set besides to the monitored flags),
00572  *        the I2C_CheckEvent() function may return SUCCESS despite the communication
00573  *        hold or corrupted real state. 
00574  *        In this case, it is advised to use error interrupts to monitor the error
00575  *        events and handle them in the interrupt IRQ handler.
00576  *        
00577  *        @note 
00578  *        For error management, it is advised to use the following functions:
00579  *          - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
00580  *          - I2Cx_ER_IRQHandler() which is called when the error interurpt occurs.
00581  *            Where x is the peripheral instance (I2C1, I2C2 ...)
00582  *          - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler()
00583  *            in order to determine which error occured.
00584  *          - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
00585  *            and/or I2C_GenerateStop() in order to clear the error flag and source,
00586  *            and return to correct communication status.
00587  *            
00588  *
00589  *  2) Advanced state monitoring:
00590  *     Using the function I2C_GetLastEvent() which returns the image of both status 
00591  *     registers in a single word (uint32_t) (Status Register 2 value is shifted left 
00592  *     by 16 bits and concatenated to Status Register 1).
00593  *     - When to use:
00594  *       - This function is suitable for the same applications above but it allows to
00595  *         overcome the limitations of I2C_GetFlagStatus() function (see below).
00596  *         The returned value could be compared to events already defined in the 
00597  *         library (stm32f10x_i2c.h) or to custom values defined by user.
00598  *       - This function is suitable when multiple flags are monitored at the same time.
00599  *       - At the opposite of I2C_CheckEvent() function, this function allows user to
00600  *         choose when an event is accepted (when all events flags are set and no 
00601  *         other flags are set or just when the needed flags are set like 
00602  *         I2C_CheckEvent() function).
00603  *     - Limitations:
00604  *       - User may need to define his own events.
00605  *       - Same remark concerning the error management is applicable for this 
00606  *         function if user decides to check only regular communication flags (and 
00607  *         ignores error flags).
00608  *     
00609  *
00610  *  3) Flag-based state monitoring:
00611  *     Using the function I2C_GetFlagStatus() which simply returns the status of 
00612  *     one single flag (ie. I2C_FLAG_RXNE ...). 
00613  *     - When to use:
00614  *        - This function could be used for specific applications or in debug phase.
00615  *        - It is suitable when only one flag checking is needed (most I2C events 
00616  *          are monitored through multiple flags).
00617  *     - Limitations: 
00618  *        - When calling this function, the Status register is accessed. Some flags are
00619  *          cleared when the status register is accessed. So checking the status
00620  *          of one Flag, may clear other ones.
00621  *        - Function may need to be called twice or more in order to monitor one 
00622  *          single event.
00623  *            
00624  */
00625 
00626 /**
00627  * 
00628  *  1) Basic state monitoring
00629  *******************************************************************************
00630  */
00631 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
00632 /**
00633  * 
00634  *  2) Advanced state monitoring
00635  *******************************************************************************
00636  */
00637 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
00638 /**
00639  * 
00640  *  3) Flag-based state monitoring
00641  *******************************************************************************
00642  */
00643 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
00644 /**
00645  *
00646  *******************************************************************************
00647  */
00648 
00649 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
00650 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
00651 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
00652 
00653 #ifdef __cplusplus
00654 }
00655 #endif
00656 
00657 #endif /*__STM32F10x_I2C_H */
00658 /**
00659   * @}
00660   */ 
00661 
00662 /**
00663   * @}
00664   */ 
00665 
00666 /**
00667   * @}
00668   */ 
00669 
00670 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

      For complete documentation on STM32(CORTEX M3) 32-bit Microcontrollers platform visit  www.st.com/STM32