stm32f10x_i2c.c

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_i2c.c
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file provides all the I2C firmware functions.
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x_i2c.h"
00023 #include "stm32f10x_rcc.h"
00024 
00025 
00026 /** @addtogroup STM32F10x_StdPeriph_Driver
00027   * @{
00028   */
00029 
00030 /** @defgroup I2C 
00031   * @brief I2C driver modules
00032   * @{
00033   */ 
00034 
00035 /** @defgroup I2C_Private_TypesDefinitions
00036   * @{
00037   */
00038 
00039 /**
00040   * @}
00041   */
00042 
00043 /** @defgroup I2C_Private_Defines
00044   * @{
00045   */
00046 
00047 /* I2C SPE mask */
00048 #define CR1_PE_Set              ((uint16_t)0x0001)
00049 #define CR1_PE_Reset            ((uint16_t)0xFFFE)
00050 
00051 /* I2C START mask */
00052 #define CR1_START_Set           ((uint16_t)0x0100)
00053 #define CR1_START_Reset         ((uint16_t)0xFEFF)
00054 
00055 /* I2C STOP mask */
00056 #define CR1_STOP_Set            ((uint16_t)0x0200)
00057 #define CR1_STOP_Reset          ((uint16_t)0xFDFF)
00058 
00059 /* I2C ACK mask */
00060 #define CR1_ACK_Set             ((uint16_t)0x0400)
00061 #define CR1_ACK_Reset           ((uint16_t)0xFBFF)
00062 
00063 /* I2C ENGC mask */
00064 #define CR1_ENGC_Set            ((uint16_t)0x0040)
00065 #define CR1_ENGC_Reset          ((uint16_t)0xFFBF)
00066 
00067 /* I2C SWRST mask */
00068 #define CR1_SWRST_Set           ((uint16_t)0x8000)
00069 #define CR1_SWRST_Reset         ((uint16_t)0x7FFF)
00070 
00071 /* I2C PEC mask */
00072 #define CR1_PEC_Set             ((uint16_t)0x1000)
00073 #define CR1_PEC_Reset           ((uint16_t)0xEFFF)
00074 
00075 /* I2C ENPEC mask */
00076 #define CR1_ENPEC_Set           ((uint16_t)0x0020)
00077 #define CR1_ENPEC_Reset         ((uint16_t)0xFFDF)
00078 
00079 /* I2C ENARP mask */
00080 #define CR1_ENARP_Set           ((uint16_t)0x0010)
00081 #define CR1_ENARP_Reset         ((uint16_t)0xFFEF)
00082 
00083 /* I2C NOSTRETCH mask */
00084 #define CR1_NOSTRETCH_Set       ((uint16_t)0x0080)
00085 #define CR1_NOSTRETCH_Reset     ((uint16_t)0xFF7F)
00086 
00087 /* I2C registers Masks */
00088 #define CR1_CLEAR_Mask          ((uint16_t)0xFBF5)
00089 
00090 /* I2C DMAEN mask */
00091 #define CR2_DMAEN_Set           ((uint16_t)0x0800)
00092 #define CR2_DMAEN_Reset         ((uint16_t)0xF7FF)
00093 
00094 /* I2C LAST mask */
00095 #define CR2_LAST_Set            ((uint16_t)0x1000)
00096 #define CR2_LAST_Reset          ((uint16_t)0xEFFF)
00097 
00098 /* I2C FREQ mask */
00099 #define CR2_FREQ_Reset          ((uint16_t)0xFFC0)
00100 
00101 /* I2C ADD0 mask */
00102 #define OAR1_ADD0_Set           ((uint16_t)0x0001)
00103 #define OAR1_ADD0_Reset         ((uint16_t)0xFFFE)
00104 
00105 /* I2C ENDUAL mask */
00106 #define OAR2_ENDUAL_Set         ((uint16_t)0x0001)
00107 #define OAR2_ENDUAL_Reset       ((uint16_t)0xFFFE)
00108 
00109 /* I2C ADD2 mask */
00110 #define OAR2_ADD2_Reset         ((uint16_t)0xFF01)
00111 
00112 /* I2C F/S mask */
00113 #define CCR_FS_Set              ((uint16_t)0x8000)
00114 
00115 /* I2C CCR mask */
00116 #define CCR_CCR_Set             ((uint16_t)0x0FFF)
00117 
00118 /* I2C FLAG mask */
00119 #define FLAG_Mask               ((uint32_t)0x00FFFFFF)
00120 
00121 /* I2C Interrupt Enable mask */
00122 #define ITEN_Mask               ((uint32_t)0x07000000)
00123 
00124 /**
00125   * @}
00126   */
00127 
00128 /** @defgroup I2C_Private_Macros
00129   * @{
00130   */
00131 
00132 /**
00133   * @}
00134   */
00135 
00136 /** @defgroup I2C_Private_Variables
00137   * @{
00138   */
00139 
00140 /**
00141   * @}
00142   */
00143 
00144 /** @defgroup I2C_Private_FunctionPrototypes
00145   * @{
00146   */
00147 
00148 /**
00149   * @}
00150   */
00151 
00152 /** @defgroup I2C_Private_Functions
00153   * @{
00154   */
00155 
00156 /**
00157   * @brief  Deinitializes the I2Cx peripheral registers to their default reset values.
00158   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00159   * @retval None
00160   */
00161 void I2C_DeInit(I2C_TypeDef* I2Cx)
00162 {
00163   /* Check the parameters */
00164   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00165 
00166   if (I2Cx == I2C1)
00167   {
00168     /* Enable I2C1 reset state */
00169     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
00170     /* Release I2C1 from reset state */
00171     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
00172   }
00173   else
00174   {
00175     /* Enable I2C2 reset state */
00176     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
00177     /* Release I2C2 from reset state */
00178     RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
00179   }
00180 }
00181 
00182 /**
00183   * @brief  Initializes the I2Cx peripheral according to the specified 
00184   *   parameters in the I2C_InitStruct.
00185   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00186   * @param  I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
00187   *   contains the configuration information for the specified I2C peripheral.
00188   * @retval None
00189   */
00190 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
00191 {
00192   uint16_t tmpreg = 0, freqrange = 0;
00193   uint16_t result = 0x04;
00194   uint32_t pclk1 = 8000000;
00195   RCC_ClocksTypeDef  rcc_clocks;
00196   /* Check the parameters */
00197   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00198   assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));
00199   assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
00200   assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
00201   assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
00202   assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
00203   assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
00204 
00205 /*---------------------------- I2Cx CR2 Configuration ------------------------*/
00206   /* Get the I2Cx CR2 value */
00207   tmpreg = I2Cx->CR2;
00208   /* Clear frequency FREQ[5:0] bits */
00209   tmpreg &= CR2_FREQ_Reset;
00210   /* Get pclk1 frequency value */
00211   RCC_GetClocksFreq(&rcc_clocks);
00212   pclk1 = rcc_clocks.PCLK1_Frequency;
00213   /* Set frequency bits depending on pclk1 value */
00214   freqrange = (uint16_t)(pclk1 / 1000000);
00215   tmpreg |= freqrange;
00216   /* Write to I2Cx CR2 */
00217   I2Cx->CR2 = tmpreg;
00218 
00219 /*---------------------------- I2Cx CCR Configuration ------------------------*/
00220   /* Disable the selected I2C peripheral to configure TRISE */
00221   I2Cx->CR1 &= CR1_PE_Reset;
00222   /* Reset tmpreg value */
00223   /* Clear F/S, DUTY and CCR[11:0] bits */
00224   tmpreg = 0;
00225 
00226   /* Configure speed in standard mode */
00227   if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
00228   {
00229     /* Standard mode speed calculate */
00230     result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
00231     /* Test if CCR value is under 0x4*/
00232     if (result < 0x04)
00233     {
00234       /* Set minimum allowed value */
00235       result = 0x04;  
00236     }
00237     /* Set speed value for standard mode */
00238     tmpreg |= result;     
00239     /* Set Maximum Rise Time for standard mode */
00240     I2Cx->TRISE = freqrange + 1; 
00241   }
00242   /* Configure speed in fast mode */
00243   else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
00244   {
00245     if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
00246     {
00247       /* Fast mode speed calculate: Tlow/Thigh = 2 */
00248       result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
00249     }
00250     else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
00251     {
00252       /* Fast mode speed calculate: Tlow/Thigh = 16/9 */
00253       result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
00254       /* Set DUTY bit */
00255       result |= I2C_DutyCycle_16_9;
00256     }
00257 
00258     /* Test if CCR value is under 0x1*/
00259     if ((result & CCR_CCR_Set) == 0)
00260     {
00261       /* Set minimum allowed value */
00262       result |= (uint16_t)0x0001;  
00263     }
00264     /* Set speed value and set F/S bit for fast mode */
00265     tmpreg |= (uint16_t)(result | CCR_FS_Set);
00266     /* Set Maximum Rise Time for fast mode */
00267     I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);  
00268   }
00269 
00270   /* Write to I2Cx CCR */
00271   I2Cx->CCR = tmpreg;
00272   /* Enable the selected I2C peripheral */
00273   I2Cx->CR1 |= CR1_PE_Set;
00274 
00275 /*---------------------------- I2Cx CR1 Configuration ------------------------*/
00276   /* Get the I2Cx CR1 value */
00277   tmpreg = I2Cx->CR1;
00278   /* Clear ACK, SMBTYPE and  SMBUS bits */
00279   tmpreg &= CR1_CLEAR_Mask;
00280   /* Configure I2Cx: mode and acknowledgement */
00281   /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
00282   /* Set ACK bit according to I2C_Ack value */
00283   tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
00284   /* Write to I2Cx CR1 */
00285   I2Cx->CR1 = tmpreg;
00286 
00287 /*---------------------------- I2Cx OAR1 Configuration -----------------------*/
00288   /* Set I2Cx Own Address1 and acknowledged address */
00289   I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
00290 }
00291 
00292 /**
00293   * @brief  Fills each I2C_InitStruct member with its default value.
00294   * @param  I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
00295   * @retval None
00296   */
00297 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
00298 {
00299 /*---------------- Reset I2C init structure parameters values ----------------*/
00300   /* initialize the I2C_ClockSpeed member */
00301   I2C_InitStruct->I2C_ClockSpeed = 5000;
00302   /* Initialize the I2C_Mode member */
00303   I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
00304   /* Initialize the I2C_DutyCycle member */
00305   I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
00306   /* Initialize the I2C_OwnAddress1 member */
00307   I2C_InitStruct->I2C_OwnAddress1 = 0;
00308   /* Initialize the I2C_Ack member */
00309   I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
00310   /* Initialize the I2C_AcknowledgedAddress member */
00311   I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
00312 }
00313 
00314 /**
00315   * @brief  Enables or disables the specified I2C peripheral.
00316   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00317   * @param  NewState: new state of the I2Cx peripheral. 
00318   *   This parameter can be: ENABLE or DISABLE.
00319   * @retval None
00320   */
00321 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00322 {
00323   /* Check the parameters */
00324   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00325   assert_param(IS_FUNCTIONAL_STATE(NewState));
00326   if (NewState != DISABLE)
00327   {
00328     /* Enable the selected I2C peripheral */
00329     I2Cx->CR1 |= CR1_PE_Set;
00330   }
00331   else
00332   {
00333     /* Disable the selected I2C peripheral */
00334     I2Cx->CR1 &= CR1_PE_Reset;
00335   }
00336 }
00337 
00338 /**
00339   * @brief  Enables or disables the specified I2C DMA requests.
00340   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00341   * @param  NewState: new state of the I2C DMA transfer.
00342   *   This parameter can be: ENABLE or DISABLE.
00343   * @retval None
00344   */
00345 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00346 {
00347   /* Check the parameters */
00348   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00349   assert_param(IS_FUNCTIONAL_STATE(NewState));
00350   if (NewState != DISABLE)
00351   {
00352     /* Enable the selected I2C DMA requests */
00353     I2Cx->CR2 |= CR2_DMAEN_Set;
00354   }
00355   else
00356   {
00357     /* Disable the selected I2C DMA requests */
00358     I2Cx->CR2 &= CR2_DMAEN_Reset;
00359   }
00360 }
00361 
00362 /**
00363   * @brief  Specifies if the next DMA transfer will be the last one.
00364   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00365   * @param  NewState: new state of the I2C DMA last transfer.
00366   *   This parameter can be: ENABLE or DISABLE.
00367   * @retval None
00368   */
00369 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00370 {
00371   /* Check the parameters */
00372   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00373   assert_param(IS_FUNCTIONAL_STATE(NewState));
00374   if (NewState != DISABLE)
00375   {
00376     /* Next DMA transfer is the last transfer */
00377     I2Cx->CR2 |= CR2_LAST_Set;
00378   }
00379   else
00380   {
00381     /* Next DMA transfer is not the last transfer */
00382     I2Cx->CR2 &= CR2_LAST_Reset;
00383   }
00384 }
00385 
00386 /**
00387   * @brief  Generates I2Cx communication START condition.
00388   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00389   * @param  NewState: new state of the I2C START condition generation.
00390   *   This parameter can be: ENABLE or DISABLE.
00391   * @retval None.
00392   */
00393 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
00394 {
00395   /* Check the parameters */
00396   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00397   assert_param(IS_FUNCTIONAL_STATE(NewState));
00398   if (NewState != DISABLE)
00399   {
00400     /* Generate a START condition */
00401     I2Cx->CR1 |= CR1_START_Set;
00402   }
00403   else
00404   {
00405     /* Disable the START condition generation */
00406     I2Cx->CR1 &= CR1_START_Reset;
00407   }
00408 }
00409 
00410 /**
00411   * @brief  Generates I2Cx communication STOP condition.
00412   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00413   * @param  NewState: new state of the I2C STOP condition generation.
00414   *   This parameter can be: ENABLE or DISABLE.
00415   * @retval None.
00416   */
00417 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
00418 {
00419   /* Check the parameters */
00420   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00421   assert_param(IS_FUNCTIONAL_STATE(NewState));
00422   if (NewState != DISABLE)
00423   {
00424     /* Generate a STOP condition */
00425     I2Cx->CR1 |= CR1_STOP_Set;
00426   }
00427   else
00428   {
00429     /* Disable the STOP condition generation */
00430     I2Cx->CR1 &= CR1_STOP_Reset;
00431   }
00432 }
00433 
00434 /**
00435   * @brief  Enables or disables the specified I2C acknowledge feature.
00436   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00437   * @param  NewState: new state of the I2C Acknowledgement.
00438   *   This parameter can be: ENABLE or DISABLE.
00439   * @retval None.
00440   */
00441 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
00442 {
00443   /* Check the parameters */
00444   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00445   assert_param(IS_FUNCTIONAL_STATE(NewState));
00446   if (NewState != DISABLE)
00447   {
00448     /* Enable the acknowledgement */
00449     I2Cx->CR1 |= CR1_ACK_Set;
00450   }
00451   else
00452   {
00453     /* Disable the acknowledgement */
00454     I2Cx->CR1 &= CR1_ACK_Reset;
00455   }
00456 }
00457 
00458 /**
00459   * @brief  Configures the specified I2C own address2.
00460   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00461   * @param  Address: specifies the 7bit I2C own address2.
00462   * @retval None.
00463   */
00464 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address)
00465 {
00466   uint16_t tmpreg = 0;
00467 
00468   /* Check the parameters */
00469   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00470 
00471   /* Get the old register value */
00472   tmpreg = I2Cx->OAR2;
00473 
00474   /* Reset I2Cx Own address2 bit [7:1] */
00475   tmpreg &= OAR2_ADD2_Reset;
00476 
00477   /* Set I2Cx Own address2 */
00478   tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE);
00479 
00480   /* Store the new register value */
00481   I2Cx->OAR2 = tmpreg;
00482 }
00483 
00484 /**
00485   * @brief  Enables or disables the specified I2C dual addressing mode.
00486   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00487   * @param  NewState: new state of the I2C dual addressing mode.
00488   *   This parameter can be: ENABLE or DISABLE.
00489   * @retval None
00490   */
00491 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00492 {
00493   /* Check the parameters */
00494   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00495   assert_param(IS_FUNCTIONAL_STATE(NewState));
00496   if (NewState != DISABLE)
00497   {
00498     /* Enable dual addressing mode */
00499     I2Cx->OAR2 |= OAR2_ENDUAL_Set;
00500   }
00501   else
00502   {
00503     /* Disable dual addressing mode */
00504     I2Cx->OAR2 &= OAR2_ENDUAL_Reset;
00505   }
00506 }
00507 
00508 /**
00509   * @brief  Enables or disables the specified I2C general call feature.
00510   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00511   * @param  NewState: new state of the I2C General call.
00512   *   This parameter can be: ENABLE or DISABLE.
00513   * @retval None
00514   */
00515 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00516 {
00517   /* Check the parameters */
00518   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00519   assert_param(IS_FUNCTIONAL_STATE(NewState));
00520   if (NewState != DISABLE)
00521   {
00522     /* Enable generall call */
00523     I2Cx->CR1 |= CR1_ENGC_Set;
00524   }
00525   else
00526   {
00527     /* Disable generall call */
00528     I2Cx->CR1 &= CR1_ENGC_Reset;
00529   }
00530 }
00531 
00532 /**
00533   * @brief  Enables or disables the specified I2C interrupts.
00534   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00535   * @param  I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. 
00536   *   This parameter can be any combination of the following values:
00537   *     @arg I2C_IT_BUF: Buffer interrupt mask
00538   *     @arg I2C_IT_EVT: Event interrupt mask
00539   *     @arg I2C_IT_ERR: Error interrupt mask
00540   * @param  NewState: new state of the specified I2C interrupts.
00541   *   This parameter can be: ENABLE or DISABLE.
00542   * @retval None
00543   */
00544 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
00545 {
00546   /* Check the parameters */
00547   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00548   assert_param(IS_FUNCTIONAL_STATE(NewState));
00549   assert_param(IS_I2C_CONFIG_IT(I2C_IT));
00550   
00551   if (NewState != DISABLE)
00552   {
00553     /* Enable the selected I2C interrupts */
00554     I2Cx->CR2 |= I2C_IT;
00555   }
00556   else
00557   {
00558     /* Disable the selected I2C interrupts */
00559     I2Cx->CR2 &= (uint16_t)~I2C_IT;
00560   }
00561 }
00562 
00563 /**
00564   * @brief  Sends a data byte through the I2Cx peripheral.
00565   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00566   * @param  Data: Byte to be transmitted..
00567   * @retval None
00568   */
00569 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
00570 {
00571   /* Check the parameters */
00572   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00573   /* Write in the DR register the data to be sent */
00574   I2Cx->DR = Data;
00575 }
00576 
00577 /**
00578   * @brief  Returns the most recent received data by the I2Cx peripheral.
00579   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00580   * @retval The value of the received data.
00581   */
00582 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
00583 {
00584   /* Check the parameters */
00585   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00586   /* Return the data in the DR register */
00587   return (uint8_t)I2Cx->DR;
00588 }
00589 
00590 /**
00591   * @brief  Transmits the address byte to select the slave device.
00592   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00593   * @param  Address: specifies the slave address which will be transmitted
00594   * @param  I2C_Direction: specifies whether the I2C device will be a
00595   *   Transmitter or a Receiver. This parameter can be one of the following values
00596   *     @arg I2C_Direction_Transmitter: Transmitter mode
00597   *     @arg I2C_Direction_Receiver: Receiver mode
00598   * @retval None.
00599   */
00600 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction)
00601 {
00602   /* Check the parameters */
00603   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00604   assert_param(IS_I2C_DIRECTION(I2C_Direction));
00605   /* Test on the direction to set/reset the read/write bit */
00606   if (I2C_Direction != I2C_Direction_Transmitter)
00607   {
00608     /* Set the address bit0 for read */
00609     Address |= OAR1_ADD0_Set;
00610   }
00611   else
00612   {
00613     /* Reset the address bit0 for write */
00614     Address &= OAR1_ADD0_Reset;
00615   }
00616   /* Send the address */
00617   I2Cx->DR = Address;
00618 }
00619 
00620 /**
00621   * @brief  Reads the specified I2C register and returns its value.
00622   * @param  I2C_Register: specifies the register to read.
00623   *   This parameter can be one of the following values:
00624   *     @arg I2C_Register_CR1:  CR1 register.
00625   *     @arg I2C_Register_CR2:   CR2 register.
00626   *     @arg I2C_Register_OAR1:  OAR1 register.
00627   *     @arg I2C_Register_OAR2:  OAR2 register.
00628   *     @arg I2C_Register_DR:    DR register.
00629   *     @arg I2C_Register_SR1:   SR1 register.
00630   *     @arg I2C_Register_SR2:   SR2 register.
00631   *     @arg I2C_Register_CCR:   CCR register.
00632   *     @arg I2C_Register_TRISE: TRISE register.
00633   * @retval The value of the read register.
00634   */
00635 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
00636 {
00637   __IO uint32_t tmp = 0;
00638 
00639   /* Check the parameters */
00640   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00641   assert_param(IS_I2C_REGISTER(I2C_Register));
00642 
00643   tmp = (uint32_t) I2Cx;
00644   tmp += I2C_Register;
00645 
00646   /* Return the selected register value */
00647   return (*(__IO uint16_t *) tmp);
00648 }
00649 
00650 /**
00651   * @brief  Enables or disables the specified I2C software reset.
00652   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00653   * @param  NewState: new state of the I2C software reset.
00654   *   This parameter can be: ENABLE or DISABLE.
00655   * @retval None
00656   */
00657 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00658 {
00659   /* Check the parameters */
00660   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00661   assert_param(IS_FUNCTIONAL_STATE(NewState));
00662   if (NewState != DISABLE)
00663   {
00664     /* Peripheral under reset */
00665     I2Cx->CR1 |= CR1_SWRST_Set;
00666   }
00667   else
00668   {
00669     /* Peripheral not under reset */
00670     I2Cx->CR1 &= CR1_SWRST_Reset;
00671   }
00672 }
00673 
00674 /**
00675   * @brief  Drives the SMBusAlert pin high or low for the specified I2C.
00676   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00677   * @param  I2C_SMBusAlert: specifies SMBAlert pin level. 
00678   *   This parameter can be one of the following values:
00679   *     @arg I2C_SMBusAlert_Low: SMBAlert pin driven low
00680   *     @arg I2C_SMBusAlert_High: SMBAlert pin driven high
00681   * @retval None
00682   */
00683 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert)
00684 {
00685   /* Check the parameters */
00686   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00687   assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
00688   if (I2C_SMBusAlert == I2C_SMBusAlert_Low)
00689   {
00690     /* Drive the SMBusAlert pin Low */
00691     I2Cx->CR1 |= I2C_SMBusAlert_Low;
00692   }
00693   else
00694   {
00695     /* Drive the SMBusAlert pin High  */
00696     I2Cx->CR1 &= I2C_SMBusAlert_High;
00697   }
00698 }
00699 
00700 /**
00701   * @brief  Enables or disables the specified I2C PEC transfer.
00702   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00703   * @param  NewState: new state of the I2C PEC transmission.
00704   *   This parameter can be: ENABLE or DISABLE.
00705   * @retval None
00706   */
00707 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
00708 {
00709   /* Check the parameters */
00710   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00711   assert_param(IS_FUNCTIONAL_STATE(NewState));
00712   if (NewState != DISABLE)
00713   {
00714     /* Enable the selected I2C PEC transmission */
00715     I2Cx->CR1 |= CR1_PEC_Set;
00716   }
00717   else
00718   {
00719     /* Disable the selected I2C PEC transmission */
00720     I2Cx->CR1 &= CR1_PEC_Reset;
00721   }
00722 }
00723 
00724 /**
00725   * @brief  Selects the specified I2C PEC position.
00726   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00727   * @param  I2C_PECPosition: specifies the PEC position. 
00728   *   This parameter can be one of the following values:
00729   *     @arg I2C_PECPosition_Next: indicates that the next byte is PEC
00730   *     @arg I2C_PECPosition_Current: indicates that current byte is PEC
00731   * @retval None
00732   */
00733 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition)
00734 {
00735   /* Check the parameters */
00736   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00737   assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition));
00738   if (I2C_PECPosition == I2C_PECPosition_Next)
00739   {
00740     /* Next byte in shift register is PEC */
00741     I2Cx->CR1 |= I2C_PECPosition_Next;
00742   }
00743   else
00744   {
00745     /* Current byte in shift register is PEC */
00746     I2Cx->CR1 &= I2C_PECPosition_Current;
00747   }
00748 }
00749 
00750 /**
00751   * @brief  Enables or disables the PEC value calculation of the transfered bytes.
00752   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00753   * @param  NewState: new state of the I2Cx PEC value calculation.
00754   *   This parameter can be: ENABLE or DISABLE.
00755   * @retval None
00756   */
00757 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
00758 {
00759   /* Check the parameters */
00760   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00761   assert_param(IS_FUNCTIONAL_STATE(NewState));
00762   if (NewState != DISABLE)
00763   {
00764     /* Enable the selected I2C PEC calculation */
00765     I2Cx->CR1 |= CR1_ENPEC_Set;
00766   }
00767   else
00768   {
00769     /* Disable the selected I2C PEC calculation */
00770     I2Cx->CR1 &= CR1_ENPEC_Reset;
00771   }
00772 }
00773 
00774 /**
00775   * @brief  Returns the PEC value for the specified I2C.
00776   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00777   * @retval The PEC value.
00778   */
00779 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
00780 {
00781   /* Check the parameters */
00782   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00783   /* Return the selected I2C PEC value */
00784   return ((I2Cx->SR2) >> 8);
00785 }
00786 
00787 /**
00788   * @brief  Enables or disables the specified I2C ARP.
00789   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00790   * @param  NewState: new state of the I2Cx ARP. 
00791   *   This parameter can be: ENABLE or DISABLE.
00792   * @retval None
00793   */
00794 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00795 {
00796   /* Check the parameters */
00797   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00798   assert_param(IS_FUNCTIONAL_STATE(NewState));
00799   if (NewState != DISABLE)
00800   {
00801     /* Enable the selected I2C ARP */
00802     I2Cx->CR1 |= CR1_ENARP_Set;
00803   }
00804   else
00805   {
00806     /* Disable the selected I2C ARP */
00807     I2Cx->CR1 &= CR1_ENARP_Reset;
00808   }
00809 }
00810 
00811 /**
00812   * @brief  Enables or disables the specified I2C Clock stretching.
00813   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00814   * @param  NewState: new state of the I2Cx Clock stretching.
00815   *   This parameter can be: ENABLE or DISABLE.
00816   * @retval None
00817   */
00818 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
00819 {
00820   /* Check the parameters */
00821   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00822   assert_param(IS_FUNCTIONAL_STATE(NewState));
00823   if (NewState == DISABLE)
00824   {
00825     /* Enable the selected I2C Clock stretching */
00826     I2Cx->CR1 |= CR1_NOSTRETCH_Set;
00827   }
00828   else
00829   {
00830     /* Disable the selected I2C Clock stretching */
00831     I2Cx->CR1 &= CR1_NOSTRETCH_Reset;
00832   }
00833 }
00834 
00835 /**
00836   * @brief  Selects the specified I2C fast mode duty cycle.
00837   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00838   * @param  I2C_DutyCycle: specifies the fast mode duty cycle.
00839   *   This parameter can be one of the following values:
00840   *     @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2
00841   *     @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9
00842   * @retval None
00843   */
00844 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle)
00845 {
00846   /* Check the parameters */
00847   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00848   assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle));
00849   if (I2C_DutyCycle != I2C_DutyCycle_16_9)
00850   {
00851     /* I2C fast mode Tlow/Thigh=2 */
00852     I2Cx->CCR &= I2C_DutyCycle_2;
00853   }
00854   else
00855   {
00856     /* I2C fast mode Tlow/Thigh=16/9 */
00857     I2Cx->CCR |= I2C_DutyCycle_16_9;
00858   }
00859 }
00860 
00861 
00862 
00863 /**
00864  * @brief
00865  ****************************************************************************************
00866  *
00867  *                         I2C State Monitoring Functions
00868  *                       
00869  ****************************************************************************************   
00870  * This I2C driver provides three different ways for I2C state monitoring
00871  *  depending on the application requirements and constraints:
00872  *        
00873  *  
00874  * 1) Basic state monitoring:
00875  *    Using I2C_CheckEvent() function:
00876  *    It compares the status registers (SR1 and SR2) content to a given event
00877  *    (can be the combination of one or more flags).
00878  *    It returns SUCCESS if the current status includes the given flags 
00879  *    and returns ERROR if one or more flags are missing in the current status.
00880  *    - When to use:
00881  *      - This function is suitable for most applciations as well as for startup 
00882  *      activity since the events are fully described in the product reference manual 
00883  *      (RM0008).
00884  *      - It is also suitable for users who need to define their own events.
00885  *    - Limitations:
00886  *      - If an error occurs (ie. error flags are set besides to the monitored flags),
00887  *        the I2C_CheckEvent() function may return SUCCESS despite the communication
00888  *        hold or corrupted real state. 
00889  *        In this case, it is advised to use error interrupts to monitor the error
00890  *        events and handle them in the interrupt IRQ handler.
00891  *        
00892  *        @note 
00893  *        For error management, it is advised to use the following functions:
00894  *          - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
00895  *          - I2Cx_ER_IRQHandler() which is called when the error interurpt occurs.
00896  *            Where x is the peripheral instance (I2C1, I2C2 ...)
00897  *          - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() 
00898  *            in order to determine which error occured.
00899  *          - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
00900  *            and/or I2C_GenerateStop() in order to clear the error flag and source,
00901  *            and return to correct communication status.
00902  *            
00903  *
00904  *  2) Advanced state monitoring:
00905  *     Using the function I2C_GetLastEvent() which returns the image of both status 
00906  *     registers in a single word (uint32_t) (Status Register 2 value is shifted left 
00907  *     by 16 bits and concatenated to Status Register 1).
00908  *     - When to use:
00909  *       - This function is suitable for the same applications above but it allows to
00910  *         overcome the mentionned limitation of I2C_GetFlagStatus() function.
00911  *         The returned value could be compared to events already defined in the 
00912  *         library (stm32f10x_i2c.h) or to custom values defiend by user.
00913  *       - This function is suitable when multiple flags are monitored at the same time.
00914  *       - At the opposite of I2C_CheckEvent() function, this function allows user to
00915  *         choose when an event is accepted (when all events flags are set and no 
00916  *         other flags are set or just when the needed flags are set like 
00917  *         I2C_CheckEvent() function).
00918  *     - Limitations:
00919  *       - User may need to define his own events.
00920  *       - Same remark concerning the error management is applicable for this 
00921  *         function if user decides to check only regular communication flags (and 
00922  *         ignores error flags).
00923  *     
00924  *
00925  *  3) Flag-based state monitoring:
00926  *     Using the function I2C_GetFlagStatus() which simply returns the status of 
00927  *     one single flag (ie. I2C_FLAG_RXNE ...). 
00928  *     - When to use:
00929  *        - This function could be used for specific applications or in debug phase.
00930  *        - It is suitable when only one flag checking is needed (most I2C events 
00931  *          are monitored through multiple flags).
00932  *     - Limitations: 
00933  *        - When calling this function, the Status register is accessed. Some flags are
00934  *          cleared when the status register is accessed. So checking the status
00935  *          of one Flag, may clear other ones.
00936  *        - Function may need to be called twice or more in order to monitor one 
00937  *          single event.
00938  *
00939  *  For detailed description of Events, please refer to section I2C_Events in 
00940  *  stm32f10x_i2c.h file.
00941  *  
00942  */
00943 
00944 /**
00945  * 
00946  *  1) Basic state monitoring
00947  *******************************************************************************
00948  */
00949 
00950 /**
00951   * @brief  Checks whether the last I2Cx Event is equal to the one passed
00952   *   as parameter.
00953   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
00954   * @param  I2C_EVENT: specifies the event to be checked. 
00955   *   This parameter can be one of the following values:
00956   *     @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED           : EV1
00957   *     @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED              : EV1
00958   *     @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED     : EV1
00959   *     @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED        : EV1
00960   *     @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED            : EV1
00961   *     @arg I2C_EVENT_SLAVE_BYTE_RECEIVED                         : EV2
00962   *     @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)      : EV2
00963   *     @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)    : EV2
00964   *     @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED                      : EV3
00965   *     @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)   : EV3
00966   *     @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3
00967   *     @arg I2C_EVENT_SLAVE_ACK_FAILURE                           : EV3_2
00968   *     @arg I2C_EVENT_SLAVE_STOP_DETECTED                         : EV4
00969   *     @arg I2C_EVENT_MASTER_MODE_SELECT                          : EV5
00970   *     @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED            : EV6     
00971   *     @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED               : EV6
00972   *     @arg I2C_EVENT_MASTER_BYTE_RECEIVED                        : EV7
00973   *     @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING                    : EV8
00974   *     @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED                     : EV8_2
00975   *     @arg I2C_EVENT_MASTER_MODE_ADDRESS10                       : EV9
00976   *     
00977   * @note: For detailed description of Events, please refer to section 
00978   *    I2C_Events in stm32f10x_i2c.h file.
00979   *    
00980   * @retval An ErrorStatus enumuration value:
00981   * - SUCCESS: Last event is equal to the I2C_EVENT
00982   * - ERROR: Last event is different from the I2C_EVENT
00983   */
00984 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
00985 {
00986   uint32_t lastevent = 0;
00987   uint32_t flag1 = 0, flag2 = 0;
00988   ErrorStatus status = ERROR;
00989 
00990   /* Check the parameters */
00991   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
00992   assert_param(IS_I2C_EVENT(I2C_EVENT));
00993 
00994   /* Read the I2Cx status register */
00995   flag1 = I2Cx->SR1;
00996   flag2 = I2Cx->SR2;
00997   flag2 = flag2 << 16;
00998 
00999   /* Get the last event value from I2C status register */
01000   lastevent = (flag1 | flag2) & FLAG_Mask;
01001 
01002   /* Check whether the last event contains the I2C_EVENT */
01003   if ((lastevent & I2C_EVENT) == I2C_EVENT)
01004   {
01005     /* SUCCESS: last event is equal to I2C_EVENT */
01006     status = SUCCESS;
01007   }
01008   else
01009   {
01010     /* ERROR: last event is different from I2C_EVENT */
01011     status = ERROR;
01012   }
01013   /* Return status */
01014   return status;
01015 }
01016 
01017 /**
01018  * 
01019  *  2) Advanced state monitoring
01020  *******************************************************************************
01021  */
01022 
01023 /**
01024   * @brief  Returns the last I2Cx Event.
01025   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
01026   *     
01027   * @note: For detailed description of Events, please refer to section 
01028   *    I2C_Events in stm32f10x_i2c.h file.
01029   *    
01030   * @retval The last event
01031   */
01032 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
01033 {
01034   uint32_t lastevent = 0;
01035   uint32_t flag1 = 0, flag2 = 0;
01036 
01037   /* Check the parameters */
01038   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
01039 
01040   /* Read the I2Cx status register */
01041   flag1 = I2Cx->SR1;
01042   flag2 = I2Cx->SR2;
01043   flag2 = flag2 << 16;
01044 
01045   /* Get the last event value from I2C status register */
01046   lastevent = (flag1 | flag2) & FLAG_Mask;
01047 
01048   /* Return status */
01049   return lastevent;
01050 }
01051 
01052 /**
01053  * 
01054  *  3) Flag-based state monitoring
01055  *******************************************************************************
01056  */
01057 
01058 /**
01059   * @brief  Checks whether the specified I2C flag is set or not.
01060   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
01061   * @param  I2C_FLAG: specifies the flag to check. 
01062   *   This parameter can be one of the following values:
01063   *     @arg I2C_FLAG_DUALF: Dual flag (Slave mode)
01064   *     @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode)
01065   *     @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode)
01066   *     @arg I2C_FLAG_GENCALL: General call header flag (Slave mode)
01067   *     @arg I2C_FLAG_TRA: Transmitter/Receiver flag
01068   *     @arg I2C_FLAG_BUSY: Bus busy flag
01069   *     @arg I2C_FLAG_MSL: Master/Slave flag
01070   *     @arg I2C_FLAG_SMBALERT: SMBus Alert flag
01071   *     @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
01072   *     @arg I2C_FLAG_PECERR: PEC error in reception flag
01073   *     @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
01074   *     @arg I2C_FLAG_AF: Acknowledge failure flag
01075   *     @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
01076   *     @arg I2C_FLAG_BERR: Bus error flag
01077   *     @arg I2C_FLAG_TXE: Data register empty flag (Transmitter)
01078   *     @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag
01079   *     @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode)
01080   *     @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode)
01081   *     @arg I2C_FLAG_BTF: Byte transfer finished flag
01082   *     @arg I2C_FLAG_ADDR: Address sent flag (Master mode) “ADSL”
01083   *   Address matched flag (Slave mode)”ENDAD”
01084   *     @arg I2C_FLAG_SB: Start bit flag (Master mode)
01085   * @retval The new state of I2C_FLAG (SET or RESET).
01086   */
01087 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
01088 {
01089   FlagStatus bitstatus = RESET;
01090   __IO uint32_t i2creg = 0, i2cxbase = 0;
01091 
01092   /* Check the parameters */
01093   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
01094   assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
01095 
01096   /* Get the I2Cx peripheral base address */
01097   i2cxbase = (uint32_t)I2Cx;
01098   
01099   /* Read flag register index */
01100   i2creg = I2C_FLAG >> 28;
01101   
01102   /* Get bit[23:0] of the flag */
01103   I2C_FLAG &= FLAG_Mask;
01104   
01105   if(i2creg != 0)
01106   {
01107     /* Get the I2Cx SR1 register address */
01108     i2cxbase += 0x14;
01109   }
01110   else
01111   {
01112     /* Flag in I2Cx SR2 Register */
01113     I2C_FLAG = (uint32_t)(I2C_FLAG >> 16);
01114     /* Get the I2Cx SR2 register address */
01115     i2cxbase += 0x18;
01116   }
01117   
01118   if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET)
01119   {
01120     /* I2C_FLAG is set */
01121     bitstatus = SET;
01122   }
01123   else
01124   {
01125     /* I2C_FLAG is reset */
01126     bitstatus = RESET;
01127   }
01128   
01129   /* Return the I2C_FLAG status */
01130   return  bitstatus;
01131 }
01132 
01133 
01134 
01135 /**
01136   * @brief  Clears the I2Cx's pending flags.
01137   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
01138   * @param  I2C_FLAG: specifies the flag to clear. 
01139   *   This parameter can be any combination of the following values:
01140   *     @arg I2C_FLAG_SMBALERT: SMBus Alert flag
01141   *     @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
01142   *     @arg I2C_FLAG_PECERR: PEC error in reception flag
01143   *     @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
01144   *     @arg I2C_FLAG_AF: Acknowledge failure flag
01145   *     @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
01146   *     @arg I2C_FLAG_BERR: Bus error flag
01147   *   
01148   * @note
01149   *   - STOPF (STOP detection) is cleared by software sequence: a read operation 
01150   *     to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation 
01151   *     to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
01152   *   - ADD10 (10-bit header sent) is cleared by software sequence: a read 
01153   *     operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the 
01154   *     second byte of the address in DR register.
01155   *   - BTF (Byte Transfer Finished) is cleared by software sequence: a read 
01156   *     operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a 
01157   *     read/write to I2C_DR register (I2C_SendData()).
01158   *   - ADDR (Address sent) is cleared by software sequence: a read operation to 
01159   *     I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to 
01160   *     I2C_SR2 register ((void)(I2Cx->SR2)).
01161   *   - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1
01162   *     register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR
01163   *     register  (I2C_SendData()).
01164   * @retval None
01165   */
01166 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
01167 {
01168   uint32_t flagpos = 0;
01169   /* Check the parameters */
01170   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
01171   assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
01172   /* Get the I2C flag position */
01173   flagpos = I2C_FLAG & FLAG_Mask;
01174   /* Clear the selected I2C flag */
01175   I2Cx->SR1 = (uint16_t)~flagpos;
01176 }
01177 
01178 /**
01179   * @brief  Checks whether the specified I2C interrupt has occurred or not.
01180   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
01181   * @param  I2C_IT: specifies the interrupt source to check. 
01182   *   This parameter can be one of the following values:
01183   *     @arg I2C_IT_SMBALERT: SMBus Alert flag
01184   *     @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag
01185   *     @arg I2C_IT_PECERR: PEC error in reception flag
01186   *     @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode)
01187   *     @arg I2C_IT_AF: Acknowledge failure flag
01188   *     @arg I2C_IT_ARLO: Arbitration lost flag (Master mode)
01189   *     @arg I2C_IT_BERR: Bus error flag
01190   *     @arg I2C_IT_TXE: Data register empty flag (Transmitter)
01191   *     @arg I2C_IT_RXNE: Data register not empty (Receiver) flag
01192   *     @arg I2C_IT_STOPF: Stop detection flag (Slave mode)
01193   *     @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode)
01194   *     @arg I2C_IT_BTF: Byte transfer finished flag
01195   *     @arg I2C_IT_ADDR: Address sent flag (Master mode) “ADSL”
01196   *                       Address matched flag (Slave mode)”ENDAD”
01197   *     @arg I2C_IT_SB: Start bit flag (Master mode)
01198   * @retval The new state of I2C_IT (SET or RESET).
01199   */
01200 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
01201 {
01202   ITStatus bitstatus = RESET;
01203   uint32_t enablestatus = 0;
01204 
01205   /* Check the parameters */
01206   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
01207   assert_param(IS_I2C_GET_IT(I2C_IT));
01208 
01209   /* Check if the interrupt source is enabled or not */
01210   enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CR2)) ;
01211   
01212   /* Get bit[23:0] of the flag */
01213   I2C_IT &= FLAG_Mask;
01214 
01215   /* Check the status of the specified I2C flag */
01216   if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus)
01217   {
01218     /* I2C_IT is set */
01219     bitstatus = SET;
01220   }
01221   else
01222   {
01223     /* I2C_IT is reset */
01224     bitstatus = RESET;
01225   }
01226   /* Return the I2C_IT status */
01227   return  bitstatus;
01228 }
01229 
01230 /**
01231   * @brief  Clears the I2Cx’s interrupt pending bits.
01232   * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
01233   * @param  I2C_IT: specifies the interrupt pending bit to clear. 
01234   *   This parameter can be any combination of the following values:
01235   *     @arg I2C_IT_SMBALERT: SMBus Alert interrupt
01236   *     @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt
01237   *     @arg I2C_IT_PECERR: PEC error in reception  interrupt
01238   *     @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode)
01239   *     @arg I2C_IT_AF: Acknowledge failure interrupt
01240   *     @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode)
01241   *     @arg I2C_IT_BERR: Bus error interrupt
01242   *   
01243   * @note
01244   *   - STOPF (STOP detection) is cleared by software sequence: a read operation 
01245   *     to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to 
01246   *     I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral).
01247   *   - ADD10 (10-bit header sent) is cleared by software sequence: a read 
01248   *     operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second 
01249   *     byte of the address in I2C_DR register.
01250   *   - BTF (Byte Transfer Finished) is cleared by software sequence: a read 
01251   *     operation to I2C_SR1 register (I2C_GetITStatus()) followed by a 
01252   *     read/write to I2C_DR register (I2C_SendData()).
01253   *   - ADDR (Address sent) is cleared by software sequence: a read operation to 
01254   *     I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to 
01255   *     I2C_SR2 register ((void)(I2Cx->SR2)).
01256   *   - SB (Start Bit) is cleared by software sequence: a read operation to 
01257   *     I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to 
01258   *     I2C_DR register (I2C_SendData()).
01259   * @retval None
01260   */
01261 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
01262 {
01263   uint32_t flagpos = 0;
01264   /* Check the parameters */
01265   assert_param(IS_I2C_ALL_PERIPH(I2Cx));
01266   assert_param(IS_I2C_CLEAR_IT(I2C_IT));
01267   /* Get the I2C flag position */
01268   flagpos = I2C_IT & FLAG_Mask;
01269   /* Clear the selected I2C flag */
01270   I2Cx->SR1 = (uint16_t)~flagpos;
01271 }
01272 
01273 /**
01274   * @}
01275   */ 
01276 
01277 /**
01278   * @}
01279   */ 
01280 
01281 /**
01282   * @}
01283   */ 
01284 
01285 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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