stm32f10x_gpio.c

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_gpio.c
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file provides all the GPIO firmware functions.
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x_gpio.h"
00023 #include "stm32f10x_rcc.h"
00024 
00025 /** @addtogroup STM32F10x_StdPeriph_Driver
00026   * @{
00027   */
00028 
00029 /** @defgroup GPIO 
00030   * @brief GPIO driver modules
00031   * @{
00032   */ 
00033 
00034 /** @defgroup GPIO_Private_TypesDefinitions
00035   * @{
00036   */
00037 
00038 /**
00039   * @}
00040   */
00041 
00042 /** @defgroup GPIO_Private_Defines
00043   * @{
00044   */
00045 
00046 /* ------------ RCC registers bit address in the alias region ----------------*/
00047 #define AFIO_OFFSET                 (AFIO_BASE - PERIPH_BASE)
00048 
00049 /* --- EVENTCR Register -----*/
00050 
00051 /* Alias word address of EVOE bit */
00052 #define EVCR_OFFSET                 (AFIO_OFFSET + 0x00)
00053 #define EVOE_BitNumber              ((uint8_t)0x07)
00054 #define EVCR_EVOE_BB                (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
00055 
00056 
00057 /* ---  MAPR Register ---*/ 
00058 /* Alias word address of MII_RMII_SEL bit */ 
00059 #define MAPR_OFFSET                 (AFIO_OFFSET + 0x04) 
00060 #define MII_RMII_SEL_BitNumber      ((u8)0x17) 
00061 #define MAPR_MII_RMII_SEL_BB        (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
00062 
00063 
00064 #define EVCR_PORTPINCONFIG_MASK     ((uint16_t)0xFF80)
00065 #define LSB_MASK                    ((uint16_t)0xFFFF)
00066 #define DBGAFR_POSITION_MASK        ((uint32_t)0x000F0000)
00067 #define DBGAFR_SWJCFG_MASK          ((uint32_t)0xF0FFFFFF)
00068 #define DBGAFR_LOCATION_MASK        ((uint32_t)0x00200000)
00069 #define DBGAFR_NUMBITS_MASK         ((uint32_t)0x00100000)
00070 /**
00071   * @}
00072   */
00073 
00074 /** @defgroup GPIO_Private_Macros
00075   * @{
00076   */
00077 
00078 /**
00079   * @}
00080   */
00081 
00082 /** @defgroup GPIO_Private_Variables
00083   * @{
00084   */
00085 
00086 /**
00087   * @}
00088   */
00089 
00090 /** @defgroup GPIO_Private_FunctionPrototypes
00091   * @{
00092   */
00093 
00094 /**
00095   * @}
00096   */
00097 
00098 /** @defgroup GPIO_Private_Functions
00099   * @{
00100   */
00101 
00102 /**
00103   * @brief  Deinitializes the GPIOx peripheral registers to their default reset values.
00104   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00105   * @retval None
00106   */
00107 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
00108 {
00109   /* Check the parameters */
00110   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00111   
00112   if (GPIOx == GPIOA)
00113   {
00114     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
00115     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
00116   }
00117   else if (GPIOx == GPIOB)
00118   {
00119     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
00120     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
00121   }
00122   else if (GPIOx == GPIOC)
00123   {
00124     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
00125     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
00126   }
00127   else if (GPIOx == GPIOD)
00128   {
00129     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
00130     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
00131   }    
00132   else if (GPIOx == GPIOE)
00133   {
00134     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
00135     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
00136   } 
00137   else if (GPIOx == GPIOF)
00138   {
00139     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
00140     RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
00141   }
00142   else
00143   {
00144     if (GPIOx == GPIOG)
00145     {
00146       RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
00147       RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
00148     }
00149   }
00150 }
00151 
00152 /**
00153   * @brief  Deinitializes the Alternate Functions (remap, event control
00154   *   and EXTI configuration) registers to their default reset values.
00155   * @param  None
00156   * @retval None
00157   */
00158 void GPIO_AFIODeInit(void)
00159 {
00160   RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
00161   RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
00162 }
00163 
00164 /**
00165   * @brief  Initializes the GPIOx peripheral according to the specified
00166   *   parameters in the GPIO_InitStruct.
00167   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00168   * @param  GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
00169   *   contains the configuration information for the specified GPIO peripheral.
00170   * @retval None
00171   */
00172 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
00173 {
00174   uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
00175   uint32_t tmpreg = 0x00, pinmask = 0x00;
00176   /* Check the parameters */
00177   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00178   assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
00179   assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));  
00180   
00181 /*---------------------------- GPIO Mode Configuration -----------------------*/
00182   currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
00183   if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
00184   { 
00185     /* Check the parameters */
00186     assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
00187     /* Output mode */
00188     currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
00189   }
00190 /*---------------------------- GPIO CRL Configuration ------------------------*/
00191   /* Configure the eight low port pins */
00192   if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
00193   {
00194     tmpreg = GPIOx->CRL;
00195     for (pinpos = 0x00; pinpos < 0x08; pinpos++)
00196     {
00197       pos = ((uint32_t)0x01) << pinpos;
00198       /* Get the port pins position */
00199       currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
00200       if (currentpin == pos)
00201       {
00202         pos = pinpos << 2;
00203         /* Clear the corresponding low control register bits */
00204         pinmask = ((uint32_t)0x0F) << pos;
00205         tmpreg &= ~pinmask;
00206         /* Write the mode configuration in the corresponding bits */
00207         tmpreg |= (currentmode << pos);
00208         /* Reset the corresponding ODR bit */
00209         if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
00210         {
00211           GPIOx->BRR = (((uint32_t)0x01) << pinpos);
00212         }
00213         else
00214         {
00215           /* Set the corresponding ODR bit */
00216           if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00217           {
00218             GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
00219           }
00220         }
00221       }
00222     }
00223     GPIOx->CRL = tmpreg;
00224   }
00225 /*---------------------------- GPIO CRH Configuration ------------------------*/
00226   /* Configure the eight high port pins */
00227   if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
00228   {
00229     tmpreg = GPIOx->CRH;
00230     for (pinpos = 0x00; pinpos < 0x08; pinpos++)
00231     {
00232       pos = (((uint32_t)0x01) << (pinpos + 0x08));
00233       /* Get the port pins position */
00234       currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
00235       if (currentpin == pos)
00236       {
00237         pos = pinpos << 2;
00238         /* Clear the corresponding high control register bits */
00239         pinmask = ((uint32_t)0x0F) << pos;
00240         tmpreg &= ~pinmask;
00241         /* Write the mode configuration in the corresponding bits */
00242         tmpreg |= (currentmode << pos);
00243         /* Reset the corresponding ODR bit */
00244         if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
00245         {
00246           GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
00247         }
00248         /* Set the corresponding ODR bit */
00249         if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00250         {
00251           GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
00252         }
00253       }
00254     }
00255     GPIOx->CRH = tmpreg;
00256   }
00257 }
00258 
00259 /**
00260   * @brief  Fills each GPIO_InitStruct member with its default value.
00261   * @param  GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
00262   *   be initialized.
00263   * @retval None
00264   */
00265 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
00266 {
00267   /* Reset GPIO init structure parameters values */
00268   GPIO_InitStruct->GPIO_Pin  = GPIO_Pin_All;
00269   GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
00270   GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
00271 }
00272 
00273 /**
00274   * @brief  Reads the specified input port pin.
00275   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00276   * @param  GPIO_Pin:  specifies the port bit to read.
00277   *   This parameter can be GPIO_Pin_x where x can be (0..15).
00278   * @retval The input port pin value.
00279   */
00280 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00281 {
00282   uint8_t bitstatus = 0x00;
00283   
00284   /* Check the parameters */
00285   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00286   assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 
00287   
00288   if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
00289   {
00290     bitstatus = (uint8_t)Bit_SET;
00291   }
00292   else
00293   {
00294     bitstatus = (uint8_t)Bit_RESET;
00295   }
00296   return bitstatus;
00297 }
00298 
00299 /**
00300   * @brief  Reads the specified GPIO input data port.
00301   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00302   * @retval GPIO input data port value.
00303   */
00304 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
00305 {
00306   /* Check the parameters */
00307   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00308   
00309   return ((uint16_t)GPIOx->IDR);
00310 }
00311 
00312 /**
00313   * @brief  Reads the specified output data port bit.
00314   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00315   * @param  GPIO_Pin:  specifies the port bit to read.
00316   *   This parameter can be GPIO_Pin_x where x can be (0..15).
00317   * @retval The output port pin value.
00318   */
00319 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00320 {
00321   uint8_t bitstatus = 0x00;
00322   /* Check the parameters */
00323   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00324   assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); 
00325   
00326   if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
00327   {
00328     bitstatus = (uint8_t)Bit_SET;
00329   }
00330   else
00331   {
00332     bitstatus = (uint8_t)Bit_RESET;
00333   }
00334   return bitstatus;
00335 }
00336 
00337 /**
00338   * @brief  Reads the specified GPIO output data port.
00339   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00340   * @retval GPIO output data port value.
00341   */
00342 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
00343 {
00344   /* Check the parameters */
00345   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00346     
00347   return ((uint16_t)GPIOx->ODR);
00348 }
00349 
00350 /**
00351   * @brief  Sets the selected data port bits.
00352   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00353   * @param  GPIO_Pin: specifies the port bits to be written.
00354   *   This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
00355   * @retval None
00356   */
00357 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00358 {
00359   /* Check the parameters */
00360   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00361   assert_param(IS_GPIO_PIN(GPIO_Pin));
00362   
00363   GPIOx->BSRR = GPIO_Pin;
00364 }
00365 
00366 /**
00367   * @brief  Clears the selected data port bits.
00368   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00369   * @param  GPIO_Pin: specifies the port bits to be written.
00370   *   This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
00371   * @retval None
00372   */
00373 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00374 {
00375   /* Check the parameters */
00376   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00377   assert_param(IS_GPIO_PIN(GPIO_Pin));
00378   
00379   GPIOx->BRR = GPIO_Pin;
00380 }
00381 
00382 /**
00383   * @brief  Sets or clears the selected data port bit.
00384   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00385   * @param  GPIO_Pin: specifies the port bit to be written.
00386   *   This parameter can be one of GPIO_Pin_x where x can be (0..15).
00387   * @param  BitVal: specifies the value to be written to the selected bit.
00388   *   This parameter can be one of the BitAction enum values:
00389   *     @arg Bit_RESET: to clear the port pin
00390   *     @arg Bit_SET: to set the port pin
00391   * @retval None
00392   */
00393 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
00394 {
00395   /* Check the parameters */
00396   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00397   assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
00398   assert_param(IS_GPIO_BIT_ACTION(BitVal)); 
00399   
00400   if (BitVal != Bit_RESET)
00401   {
00402     GPIOx->BSRR = GPIO_Pin;
00403   }
00404   else
00405   {
00406     GPIOx->BRR = GPIO_Pin;
00407   }
00408 }
00409 
00410 /**
00411   * @brief  Writes data to the specified GPIO data port.
00412   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00413   * @param  PortVal: specifies the value to be written to the port output data register.
00414   * @retval None
00415   */
00416 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
00417 {
00418   /* Check the parameters */
00419   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00420   
00421   GPIOx->ODR = PortVal;
00422 }
00423 
00424 /**
00425   * @brief  Locks GPIO Pins configuration registers.
00426   * @param  GPIOx: where x can be (A..G) to select the GPIO peripheral.
00427   * @param  GPIO_Pin: specifies the port bit to be written.
00428   *   This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
00429   * @retval None
00430   */
00431 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
00432 {
00433   uint32_t tmp = 0x00010000;
00434   
00435   /* Check the parameters */
00436   assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
00437   assert_param(IS_GPIO_PIN(GPIO_Pin));
00438   
00439   tmp |= GPIO_Pin;
00440   /* Set LCKK bit */
00441   GPIOx->LCKR = tmp;
00442   /* Reset LCKK bit */
00443   GPIOx->LCKR =  GPIO_Pin;
00444   /* Set LCKK bit */
00445   GPIOx->LCKR = tmp;
00446   /* Read LCKK bit*/
00447   tmp = GPIOx->LCKR;
00448   /* Read LCKK bit*/
00449   tmp = GPIOx->LCKR;
00450 }
00451 
00452 /**
00453   * @brief  Selects the GPIO pin used as Event output.
00454   * @param  GPIO_PortSource: selects the GPIO port to be used as source
00455   *   for Event output.
00456   *   This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
00457   * @param  GPIO_PinSource: specifies the pin for the Event output.
00458   *   This parameter can be GPIO_PinSourcex where x can be (0..15).
00459   * @retval None
00460   */
00461 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
00462 {
00463   uint32_t tmpreg = 0x00;
00464   /* Check the parameters */
00465   assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
00466   assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
00467     
00468   tmpreg = AFIO->EVCR;
00469   /* Clear the PORT[6:4] and PIN[3:0] bits */
00470   tmpreg &= EVCR_PORTPINCONFIG_MASK;
00471   tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
00472   tmpreg |= GPIO_PinSource;
00473   AFIO->EVCR = tmpreg;
00474 }
00475 
00476 /**
00477   * @brief  Enables or disables the Event Output.
00478   * @param  NewState: new state of the Event output.
00479   *   This parameter can be: ENABLE or DISABLE.
00480   * @retval None
00481   */
00482 void GPIO_EventOutputCmd(FunctionalState NewState)
00483 {
00484   /* Check the parameters */
00485   assert_param(IS_FUNCTIONAL_STATE(NewState));
00486   
00487   *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
00488 }
00489 
00490 /**
00491   * @brief  Changes the mapping of the specified pin.
00492   * @param  GPIO_Remap: selects the pin to remap.
00493   *   This parameter can be one of the following values:
00494   *     @arg GPIO_Remap_SPI1             : SPI1 Alternate Function mapping
00495   *     @arg GPIO_Remap_I2C1             : I2C1 Alternate Function mapping
00496   *     @arg GPIO_Remap_USART1           : USART1 Alternate Function mapping
00497   *     @arg GPIO_Remap_USART2           : USART2 Alternate Function mapping
00498   *     @arg GPIO_PartialRemap_USART3    : USART3 Partial Alternate Function mapping
00499   *     @arg GPIO_FullRemap_USART3       : USART3 Full Alternate Function mapping
00500   *     @arg GPIO_PartialRemap_TIM1      : TIM1 Partial Alternate Function mapping
00501   *     @arg GPIO_FullRemap_TIM1         : TIM1 Full Alternate Function mapping
00502   *     @arg GPIO_PartialRemap1_TIM2     : TIM2 Partial1 Alternate Function mapping
00503   *     @arg GPIO_PartialRemap2_TIM2     : TIM2 Partial2 Alternate Function mapping
00504   *     @arg GPIO_FullRemap_TIM2         : TIM2 Full Alternate Function mapping
00505   *     @arg GPIO_PartialRemap_TIM3      : TIM3 Partial Alternate Function mapping
00506   *     @arg GPIO_FullRemap_TIM3         : TIM3 Full Alternate Function mapping
00507   *     @arg GPIO_Remap_TIM4             : TIM4 Alternate Function mapping
00508   *     @arg GPIO_Remap1_CAN1            : CAN1 Alternate Function mapping
00509   *     @arg GPIO_Remap2_CAN1            : CAN1 Alternate Function mapping
00510   *     @arg GPIO_Remap_PD01             : PD01 Alternate Function mapping
00511   *     @arg GPIO_Remap_TIM5CH4_LSI      : LSI connected to TIM5 Channel4 input capture for calibration
00512   *     @arg GPIO_Remap_ADC1_ETRGINJ     : ADC1 External Trigger Injected Conversion remapping
00513   *     @arg GPIO_Remap_ADC1_ETRGREG     : ADC1 External Trigger Regular Conversion remapping
00514   *     @arg GPIO_Remap_ADC2_ETRGINJ     : ADC2 External Trigger Injected Conversion remapping
00515   *     @arg GPIO_Remap_ADC2_ETRGREG     : ADC2 External Trigger Regular Conversion remapping
00516   *     @arg GPIO_Remap_ETH              : Ethernet remapping (only for Connectivity line devices)
00517   *     @arg GPIO_Remap_CAN2             : CAN2 remapping (only for Connectivity line devices)
00518   *     @arg GPIO_Remap_SWJ_NoJTRST      : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
00519   *     @arg GPIO_Remap_SWJ_JTAGDisable  : JTAG-DP Disabled and SW-DP Enabled
00520   *     @arg GPIO_Remap_SWJ_Disable      : Full SWJ Disabled (JTAG-DP + SW-DP)
00521   *     @arg GPIO_Remap_SPI3             : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
00522   *     @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
00523   *                                        to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
00524   *                                        If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to 
00525   *                                        Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.    
00526   *     @arg GPIO_Remap_PTP_PPS          : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
00527   *     @arg GPIO_Remap_TIM15            : TIM15 Alternate Function mapping (only for Value line devices)
00528   *     @arg GPIO_Remap_TIM16            : TIM16 Alternate Function mapping (only for Value line devices)
00529   *     @arg GPIO_Remap_TIM17            : TIM17 Alternate Function mapping (only for Value line devices)
00530   *     @arg GPIO_Remap_CEC              : CEC Alternate Function mapping (only for Value line devices)
00531   *     @arg GPIO_Remap_TIM1_DMA         : TIM1 DMA requests mapping (only for Value line devices)
00532   *     @arg GPIO_Remap_TIM9             : TIM9 Alternate Function mapping (only for XL-density devices)
00533   *     @arg GPIO_Remap_TIM10            : TIM10 Alternate Function mapping (only for XL-density devices)
00534   *     @arg GPIO_Remap_TIM11            : TIM11 Alternate Function mapping (only for XL-density devices)
00535   *     @arg GPIO_Remap_TIM13            : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
00536   *     @arg GPIO_Remap_TIM14            : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
00537   *     @arg GPIO_Remap_FSMC_NADV        : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
00538   *     @arg GPIO_Remap_TIM67_DAC_DMA    : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
00539   *     @arg GPIO_Remap_TIM12            : TIM12 Alternate Function mapping (only for High density Value line devices)
00540   *     @arg GPIO_Remap_MISC             : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, 
00541   *                                        only for High density Value line devices)     
00542   * @param  NewState: new state of the port pin remapping.
00543   *   This parameter can be: ENABLE or DISABLE.
00544   * @retval None
00545   */
00546 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
00547 {
00548   uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
00549 
00550   /* Check the parameters */
00551   assert_param(IS_GPIO_REMAP(GPIO_Remap));
00552   assert_param(IS_FUNCTIONAL_STATE(NewState));  
00553   
00554   if((GPIO_Remap & 0x80000000) == 0x80000000)
00555   {
00556     tmpreg = AFIO->MAPR2;
00557   }
00558   else
00559   {
00560     tmpreg = AFIO->MAPR;
00561   }
00562 
00563   tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
00564   tmp = GPIO_Remap & LSB_MASK;
00565 
00566   if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
00567   {
00568     tmpreg &= DBGAFR_SWJCFG_MASK;
00569     AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
00570   }
00571   else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
00572   {
00573     tmp1 = ((uint32_t)0x03) << tmpmask;
00574     tmpreg &= ~tmp1;
00575     tmpreg |= ~DBGAFR_SWJCFG_MASK;
00576   }
00577   else
00578   {
00579     tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
00580     tmpreg |= ~DBGAFR_SWJCFG_MASK;
00581   }
00582 
00583   if (NewState != DISABLE)
00584   {
00585     tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
00586   }
00587 
00588   if((GPIO_Remap & 0x80000000) == 0x80000000)
00589   {
00590     AFIO->MAPR2 = tmpreg;
00591   }
00592   else
00593   {
00594     AFIO->MAPR = tmpreg;
00595   }  
00596 }
00597 
00598 /**
00599   * @brief  Selects the GPIO pin used as EXTI Line.
00600   * @param  GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
00601   *   This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
00602   * @param  GPIO_PinSource: specifies the EXTI line to be configured.
00603   *   This parameter can be GPIO_PinSourcex where x can be (0..15).
00604   * @retval None
00605   */
00606 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
00607 {
00608   uint32_t tmp = 0x00;
00609   /* Check the parameters */
00610   assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
00611   assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
00612   
00613   tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
00614   AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
00615   AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
00616 }
00617 
00618 /**
00619   * @brief  Selects the Ethernet media interface.
00620   * @note   This function applies only to STM32 Connectivity line devices.  
00621   * @param  GPIO_ETH_MediaInterface: specifies the Media Interface mode.
00622   *   This parameter can be one of the following values:
00623   *     @arg GPIO_ETH_MediaInterface_MII: MII mode
00624   *     @arg GPIO_ETH_MediaInterface_RMII: RMII mode    
00625   * @retval None
00626   */
00627 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) 
00628 { 
00629   assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); 
00630 
00631   /* Configure MII_RMII selection bit */ 
00632   *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; 
00633 }
00634   
00635 /**
00636   * @}
00637   */
00638 
00639 /**
00640   * @}
00641   */
00642 
00643 /**
00644   * @}
00645   */
00646 
00647 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

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