stm32f10x_can.c

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_can.c
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file provides all the CAN firmware functions.
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x_can.h"
00023 #include "stm32f10x_rcc.h"
00024 
00025 /** @addtogroup STM32F10x_StdPeriph_Driver
00026   * @{
00027   */
00028 
00029 /** @defgroup CAN 
00030   * @brief CAN driver modules
00031   * @{
00032   */ 
00033 
00034 /** @defgroup CAN_Private_TypesDefinitions
00035   * @{
00036   */
00037 
00038 /**
00039   * @}
00040   */
00041 
00042 /** @defgroup CAN_Private_Defines
00043   * @{
00044   */
00045 
00046 /* CAN Master Control Register bits */
00047 
00048 #define MCR_DBF      ((uint32_t)0x00010000) /* software master reset */
00049 
00050 /* CAN Mailbox Transmit Request */
00051 #define TMIDxR_TXRQ  ((uint32_t)0x00000001) /* Transmit mailbox request */
00052 
00053 /* CAN Filter Master Register bits */
00054 #define FMR_FINIT    ((uint32_t)0x00000001) /* Filter init mode */
00055 
00056 /* Time out for INAK bit */
00057 #define INAK_TIMEOUT        ((uint32_t)0x0000FFFF)
00058 /* Time out for SLAK bit */
00059 #define SLAK_TIMEOUT        ((uint32_t)0x0000FFFF)
00060 
00061 
00062 
00063 /* Flags in TSR register */
00064 #define CAN_FLAGS_TSR              ((uint32_t)0x08000000) 
00065 /* Flags in RF1R register */
00066 #define CAN_FLAGS_RF1R             ((uint32_t)0x04000000) 
00067 /* Flags in RF0R register */
00068 #define CAN_FLAGS_RF0R             ((uint32_t)0x02000000) 
00069 /* Flags in MSR register */
00070 #define CAN_FLAGS_MSR              ((uint32_t)0x01000000) 
00071 /* Flags in ESR register */
00072 #define CAN_FLAGS_ESR              ((uint32_t)0x00F00000) 
00073 
00074 
00075 /**
00076   * @}
00077   */
00078 
00079 /** @defgroup CAN_Private_Macros
00080   * @{
00081   */
00082 
00083 /**
00084   * @}
00085   */
00086 
00087 /** @defgroup CAN_Private_Variables
00088   * @{
00089   */
00090 
00091 /**
00092   * @}
00093   */
00094 
00095 /** @defgroup CAN_Private_FunctionPrototypes
00096   * @{
00097   */
00098 
00099 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit);
00100 
00101 /**
00102   * @}
00103   */
00104 
00105 /** @defgroup CAN_Private_Functions
00106   * @{
00107   */
00108 
00109 /**
00110   * @brief  Deinitializes the CAN peripheral registers to their default reset values.
00111   * @param  CANx: where x can be 1 or 2 to select the CAN peripheral.
00112   * @retval None.
00113   */
00114 void CAN_DeInit(CAN_TypeDef* CANx)
00115 {
00116   /* Check the parameters */
00117   assert_param(IS_CAN_ALL_PERIPH(CANx));
00118  
00119   if (CANx == CAN1)
00120   {
00121     /* Enable CAN1 reset state */
00122     RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE);
00123     /* Release CAN1 from reset state */
00124     RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE);
00125   }
00126   else
00127   {  
00128     /* Enable CAN2 reset state */
00129     RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE);
00130     /* Release CAN2 from reset state */
00131     RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE);
00132   }
00133 }
00134 
00135 /**
00136   * @brief  Initializes the CAN peripheral according to the specified
00137   *   parameters in the CAN_InitStruct.
00138   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00139   * @param  CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
00140   *   contains the configuration information for the CAN peripheral.
00141   * @retval Constant indicates initialization succeed which will be 
00142   *   CANINITFAILED or CANINITOK.
00143   */
00144 uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct)
00145 {
00146   uint8_t InitStatus = CANINITFAILED;
00147   uint32_t wait_ack = 0x00000000;
00148   /* Check the parameters */
00149   assert_param(IS_CAN_ALL_PERIPH(CANx));
00150   assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
00151   assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
00152   assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
00153   assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
00154   assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
00155   assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
00156   assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
00157   assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
00158   assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
00159   assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
00160   assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
00161 
00162   /* exit from sleep mode */
00163   CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP);
00164 
00165   /* Request initialisation */
00166   CANx->MCR |= CAN_MCR_INRQ ;
00167 
00168   /* Wait the acknowledge */
00169   while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
00170   {
00171     wait_ack++;
00172   }
00173 
00174   /* ...and check acknowledged */
00175   if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
00176   {
00177     InitStatus = CANINITFAILED;
00178   }
00179   else 
00180   {
00181     /* Set the time triggered communication mode */
00182     if (CAN_InitStruct->CAN_TTCM == ENABLE)
00183     {
00184       CANx->MCR |= CAN_MCR_TTCM;
00185     }
00186     else
00187     {
00188       CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM;
00189     }
00190 
00191     /* Set the automatic bus-off management */
00192     if (CAN_InitStruct->CAN_ABOM == ENABLE)
00193     {
00194       CANx->MCR |= CAN_MCR_ABOM;
00195     }
00196     else
00197     {
00198       CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM;
00199     }
00200 
00201     /* Set the automatic wake-up mode */
00202     if (CAN_InitStruct->CAN_AWUM == ENABLE)
00203     {
00204       CANx->MCR |= CAN_MCR_AWUM;
00205     }
00206     else
00207     {
00208       CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM;
00209     }
00210 
00211     /* Set the no automatic retransmission */
00212     if (CAN_InitStruct->CAN_NART == ENABLE)
00213     {
00214       CANx->MCR |= CAN_MCR_NART;
00215     }
00216     else
00217     {
00218       CANx->MCR &= ~(uint32_t)CAN_MCR_NART;
00219     }
00220 
00221     /* Set the receive FIFO locked mode */
00222     if (CAN_InitStruct->CAN_RFLM == ENABLE)
00223     {
00224       CANx->MCR |= CAN_MCR_RFLM;
00225     }
00226     else
00227     {
00228       CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM;
00229     }
00230 
00231     /* Set the transmit FIFO priority */
00232     if (CAN_InitStruct->CAN_TXFP == ENABLE)
00233     {
00234       CANx->MCR |= CAN_MCR_TXFP;
00235     }
00236     else
00237     {
00238       CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP;
00239     }
00240 
00241     /* Set the bit timing register */
00242     CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | ((uint32_t)CAN_InitStruct->CAN_SJW << 24) |
00243                ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) |
00244                ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
00245 
00246     /* Request leave initialisation */
00247     CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ;
00248 
00249    /* Wait the acknowledge */
00250    wait_ack = 0x00;
00251 
00252    while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
00253    {
00254      wait_ack++;
00255    }
00256 
00257     /* ...and check acknowledged */
00258     if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
00259     {
00260       InitStatus = CANINITFAILED;
00261     }
00262     else
00263     {
00264       InitStatus = CANINITOK ;
00265     }
00266   }
00267 
00268   /* At this step, return the status of initialization */
00269   return InitStatus;
00270 }
00271 
00272 /**
00273   * @brief  Initializes the CAN peripheral according to the specified
00274   *   parameters in the CAN_FilterInitStruct.
00275   * @param  CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef
00276   *   structure that contains the configuration information.
00277   * @retval None.
00278   */
00279 void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
00280 {
00281   uint32_t filter_number_bit_pos = 0;
00282   /* Check the parameters */
00283   assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
00284   assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
00285   assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
00286   assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
00287   assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
00288 
00289   filter_number_bit_pos = ((uint32_t)0x00000001) << CAN_FilterInitStruct->CAN_FilterNumber;
00290 
00291   /* Initialisation mode for the filter */
00292   CAN1->FMR |= FMR_FINIT;
00293 
00294   /* Filter Deactivation */
00295   CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos;
00296 
00297   /* Filter Scale */
00298   if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
00299   {
00300     /* 16-bit scale for the filter */
00301     CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos;
00302 
00303     /* First 16-bit identifier and First 16-bit mask */
00304     /* Or First 16-bit identifier and Second 16-bit identifier */
00305     CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = 
00306     ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
00307         (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
00308 
00309     /* Second 16-bit identifier and Second 16-bit mask */
00310     /* Or Third 16-bit identifier and Fourth 16-bit identifier */
00311     CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = 
00312     ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
00313         (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
00314   }
00315 
00316   if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
00317   {
00318     /* 32-bit scale for the filter */
00319     CAN1->FS1R |= filter_number_bit_pos;
00320     /* 32-bit identifier or First 32-bit identifier */
00321     CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = 
00322     ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
00323         (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
00324     /* 32-bit mask or Second 32-bit identifier */
00325     CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = 
00326     ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
00327         (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
00328   }
00329 
00330   /* Filter Mode */
00331   if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
00332   {
00333     /*Id/Mask mode for the filter*/
00334     CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos;
00335   }
00336   else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
00337   {
00338     /*Identifier list mode for the filter*/
00339     CAN1->FM1R |= (uint32_t)filter_number_bit_pos;
00340   }
00341 
00342   /* Filter FIFO assignment */
00343   if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO0)
00344   {
00345     /* FIFO 0 assignation for the filter */
00346     CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos;
00347   }
00348 
00349   if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO1)
00350   {
00351     /* FIFO 1 assignation for the filter */
00352     CAN1->FFA1R |= (uint32_t)filter_number_bit_pos;
00353   }
00354   
00355   /* Filter activation */
00356   if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
00357   {
00358     CAN1->FA1R |= filter_number_bit_pos;
00359   }
00360 
00361   /* Leave the initialisation mode for the filter */
00362   CAN1->FMR &= ~FMR_FINIT;
00363 }
00364 
00365 /**
00366   * @brief  Fills each CAN_InitStruct member with its default value.
00367   * @param  CAN_InitStruct: pointer to a CAN_InitTypeDef structure which
00368   *   will be initialized.
00369   * @retval None.
00370   */
00371 void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
00372 {
00373   /* Reset CAN init structure parameters values */
00374   /* Initialize the time triggered communication mode */
00375   CAN_InitStruct->CAN_TTCM = DISABLE;
00376   /* Initialize the automatic bus-off management */
00377   CAN_InitStruct->CAN_ABOM = DISABLE;
00378   /* Initialize the automatic wake-up mode */
00379   CAN_InitStruct->CAN_AWUM = DISABLE;
00380   /* Initialize the no automatic retransmission */
00381   CAN_InitStruct->CAN_NART = DISABLE;
00382   /* Initialize the receive FIFO locked mode */
00383   CAN_InitStruct->CAN_RFLM = DISABLE;
00384   /* Initialize the transmit FIFO priority */
00385   CAN_InitStruct->CAN_TXFP = DISABLE;
00386   /* Initialize the CAN_Mode member */
00387   CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
00388   /* Initialize the CAN_SJW member */
00389   CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
00390   /* Initialize the CAN_BS1 member */
00391   CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
00392   /* Initialize the CAN_BS2 member */
00393   CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
00394   /* Initialize the CAN_Prescaler member */
00395   CAN_InitStruct->CAN_Prescaler = 1;
00396 }
00397 
00398 /**
00399   * @brief  Select the start bank filter for slave CAN.
00400   * @note   This function applies only to STM32 Connectivity line devices.
00401   * @param  CAN_BankNumber: Select the start slave bank filter from 1..27.
00402   * @retval None.
00403   */
00404 void CAN_SlaveStartBank(uint8_t CAN_BankNumber) 
00405 {
00406   /* Check the parameters */
00407   assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber));
00408   /* enter Initialisation mode for the filter */
00409   CAN1->FMR |= FMR_FINIT;
00410   /* Select the start slave bank */
00411   CAN1->FMR &= (uint32_t)0xFFFFC0F1 ;
00412   CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8;
00413   /* Leave Initialisation mode for the filter */
00414   CAN1->FMR &= ~FMR_FINIT;
00415 }
00416 
00417 /**
00418   * @brief  Enables or disables the specified CANx interrupts.
00419   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00420   * @param  CAN_IT: specifies the CAN interrupt sources to be enabled or disabled.
00421   *   This parameter can be: 
00422   *        -CAN_IT_TME, 
00423   *        -CAN_IT_FMP0, 
00424   *        -CAN_IT_FF0,
00425   *        -CAN_IT_FOV0, 
00426   *        -CAN_IT_FMP1, 
00427   *        -CAN_IT_FF1,
00428   *        -CAN_IT_FOV1, 
00429   *        -CAN_IT_EWG, 
00430   *        -CAN_IT_EPV,
00431   *        -CAN_IT_LEC, 
00432   *        -CAN_IT_ERR, 
00433   *        -CAN_IT_WKU or 
00434   *        -CAN_IT_SLK.
00435   * @param  NewState: new state of the CAN interrupts.
00436   *   This parameter can be: ENABLE or DISABLE.
00437   * @retval None.
00438   */
00439 void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState)
00440 {
00441   /* Check the parameters */
00442   assert_param(IS_CAN_ALL_PERIPH(CANx));
00443   assert_param(IS_CAN_IT(CAN_IT));
00444   assert_param(IS_FUNCTIONAL_STATE(NewState));
00445 
00446   if (NewState != DISABLE)
00447   {
00448     /* Enable the selected CANx interrupt */
00449     CANx->IER |= CAN_IT;
00450   }
00451   else
00452   {
00453     /* Disable the selected CANx interrupt */
00454     CANx->IER &= ~CAN_IT;
00455   }
00456 }
00457 
00458 /**
00459   * @brief  Initiates the transmission of a message.
00460   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00461   * @param  TxMessage: pointer to a structure which contains CAN Id, CAN
00462   *   DLC and CAN datas.
00463   * @retval The number of the mailbox that is used for transmission
00464   *   or CAN_NO_MB if there is no empty mailbox.
00465   */
00466 uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage)
00467 {
00468   uint8_t transmit_mailbox = 0;
00469   /* Check the parameters */
00470   assert_param(IS_CAN_ALL_PERIPH(CANx));
00471   assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
00472   assert_param(IS_CAN_RTR(TxMessage->RTR));
00473   assert_param(IS_CAN_DLC(TxMessage->DLC));
00474 
00475   /* Select one empty transmit mailbox */
00476   if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0)
00477   {
00478     transmit_mailbox = 0;
00479   }
00480   else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1)
00481   {
00482     transmit_mailbox = 1;
00483   }
00484   else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2)
00485   {
00486     transmit_mailbox = 2;
00487   }
00488   else
00489   {
00490     transmit_mailbox = CAN_NO_MB;
00491   }
00492 
00493   if (transmit_mailbox != CAN_NO_MB)
00494   {
00495     /* Set up the Id */
00496     CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ;
00497     if (TxMessage->IDE == CAN_ID_STD)
00498     {
00499       assert_param(IS_CAN_STDID(TxMessage->StdId));  
00500       CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | TxMessage->RTR);
00501     }
00502     else
00503     {
00504       assert_param(IS_CAN_EXTID(TxMessage->ExtId));
00505       CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId<<3) | TxMessage->IDE | 
00506                                                TxMessage->RTR);
00507     }
00508     
00509 
00510     /* Set up the DLC */
00511     TxMessage->DLC &= (uint8_t)0x0000000F;
00512     CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0;
00513     CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC;
00514 
00515     /* Set up the data field */
00516     CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | 
00517                                              ((uint32_t)TxMessage->Data[2] << 16) |
00518                                              ((uint32_t)TxMessage->Data[1] << 8) | 
00519                                              ((uint32_t)TxMessage->Data[0]));
00520     CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | 
00521                                              ((uint32_t)TxMessage->Data[6] << 16) |
00522                                              ((uint32_t)TxMessage->Data[5] << 8) |
00523                                              ((uint32_t)TxMessage->Data[4]));
00524     /* Request transmission */
00525     CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ;
00526   }
00527   return transmit_mailbox;
00528 }
00529 
00530 /**
00531   * @brief  Checks the transmission of a message.
00532   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00533   * @param  TransmitMailbox: the number of the mailbox that is used for transmission.
00534   * @retval CANTXOK if the CAN driver transmits the message, CANTXFAILED in an other case.
00535   */
00536 uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox)
00537 {
00538   /* RQCP, TXOK and TME bits */
00539   uint8_t state = 0;
00540   /* Check the parameters */
00541   assert_param(IS_CAN_ALL_PERIPH(CANx));
00542   assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
00543   switch (TransmitMailbox)
00544   {
00545     case (0): state |= (uint8_t)((CANx->TSR & CAN_TSR_RQCP0) << 2);
00546       state |= (uint8_t)((CANx->TSR & CAN_TSR_TXOK0) >> 0);
00547       state |= (uint8_t)((CANx->TSR & CAN_TSR_TME0) >> 26);
00548       break;
00549     case (1): state |= (uint8_t)((CANx->TSR & CAN_TSR_RQCP1) >> 6);
00550       state |= (uint8_t)((CANx->TSR & CAN_TSR_TXOK1) >> 8);
00551       state |= (uint8_t)((CANx->TSR & CAN_TSR_TME1) >> 27);
00552       break;
00553     case (2): state |= (uint8_t)((CANx->TSR & CAN_TSR_RQCP2) >> 14);
00554       state |= (uint8_t)((CANx->TSR & CAN_TSR_TXOK2) >> 16);
00555       state |= (uint8_t)((CANx->TSR & CAN_TSR_TME2) >> 28);
00556       break;
00557     default:
00558       state = CANTXFAILED;
00559       break;
00560   }
00561   switch (state)
00562   {
00563       /* transmit pending  */
00564     case (0x0): state = CANTXPENDING;
00565       break;
00566       /* transmit failed  */
00567     case (0x5): state = CANTXFAILED;
00568       break;
00569       /* transmit succedeed  */
00570     case (0x7): state = CANTXOK;
00571       break;
00572     default:
00573       state = CANTXFAILED;
00574       break;
00575   }
00576   return state;
00577 }
00578 
00579 /**
00580   * @brief  Cancels a transmit request.
00581   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral. 
00582   * @param  Mailbox: Mailbox number.
00583   * @retval None.
00584   */
00585 void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox)
00586 {
00587   /* Check the parameters */
00588   assert_param(IS_CAN_ALL_PERIPH(CANx));
00589   assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
00590   /* abort transmission */
00591   switch (Mailbox)
00592   {
00593     case (0): CANx->TSR |= CAN_TSR_ABRQ0;
00594       break;
00595     case (1): CANx->TSR |= CAN_TSR_ABRQ1;
00596       break;
00597     case (2): CANx->TSR |= CAN_TSR_ABRQ2;
00598       break;
00599     default:
00600       break;
00601   }
00602 }
00603 
00604 /**
00605   * @brief  Releases a FIFO.
00606   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral. 
00607   * @param  FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
00608   * @retval None.
00609   */
00610 void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber)
00611 {
00612   /* Check the parameters */
00613   assert_param(IS_CAN_ALL_PERIPH(CANx));
00614   assert_param(IS_CAN_FIFO(FIFONumber));
00615   /* Release FIFO0 */
00616   if (FIFONumber == CAN_FIFO0)
00617   {
00618     CANx->RF0R |= CAN_RF0R_RFOM0;
00619   }
00620   /* Release FIFO1 */
00621   else /* FIFONumber == CAN_FIFO1 */
00622   {
00623     CANx->RF1R |= CAN_RF1R_RFOM1;
00624   }
00625 }
00626 
00627 /**
00628   * @brief  Returns the number of pending messages.
00629   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00630   * @param  FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
00631   * @retval NbMessage which is the number of pending message.
00632   */
00633 uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber)
00634 {
00635   uint8_t message_pending=0;
00636   /* Check the parameters */
00637   assert_param(IS_CAN_ALL_PERIPH(CANx));
00638   assert_param(IS_CAN_FIFO(FIFONumber));
00639   if (FIFONumber == CAN_FIFO0)
00640   {
00641     message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03);
00642   }
00643   else if (FIFONumber == CAN_FIFO1)
00644   {
00645     message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03);
00646   }
00647   else
00648   {
00649     message_pending = 0;
00650   }
00651   return message_pending;
00652 }
00653 
00654 /**
00655   * @brief  Receives a message.
00656   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00657   * @param  FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
00658   * @param  RxMessage: pointer to a structure receive message which 
00659   *   contains CAN Id, CAN DLC, CAN datas and FMI number.
00660   * @retval None.
00661   */
00662 void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage)
00663 {
00664   /* Check the parameters */
00665   assert_param(IS_CAN_ALL_PERIPH(CANx));
00666   assert_param(IS_CAN_FIFO(FIFONumber));
00667   /* Get the Id */
00668   RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR;
00669   if (RxMessage->IDE == CAN_ID_STD)
00670   {
00671     RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21);
00672   }
00673   else
00674   {
00675     RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3);
00676   }
00677   
00678   RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR;
00679   /* Get the DLC */
00680   RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR;
00681   /* Get the FMI */
00682   RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8);
00683   /* Get the data field */
00684   RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR;
00685   RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8);
00686   RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16);
00687   RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24);
00688   RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR;
00689   RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8);
00690   RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16);
00691   RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24);
00692   /* Release the FIFO */
00693   CAN_FIFORelease(CANx, FIFONumber);
00694 }
00695 
00696 /**
00697   * @brief  Enables or disables the DBG Freeze for CAN.
00698   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00699   * @param  NewState: new state of the CAN peripheral.
00700   *   This parameter can be: ENABLE or DISABLE.
00701   * @retval None.
00702   */
00703 void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState)
00704 {
00705   /* Check the parameters */
00706   assert_param(IS_CAN_ALL_PERIPH(CANx));
00707   assert_param(IS_FUNCTIONAL_STATE(NewState));
00708   
00709   if (NewState != DISABLE)
00710   {
00711     /* Enable Debug Freeze  */
00712     CANx->MCR |= MCR_DBF;
00713   }
00714   else
00715   {
00716     /* Disable Debug Freeze */
00717     CANx->MCR &= ~MCR_DBF;
00718   }
00719 }
00720 
00721 /**
00722   * @brief  Enters the low power mode.
00723   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00724   * @retval CANSLEEPOK if sleep entered, CANSLEEPFAILED in an other case.
00725   */
00726 uint8_t CAN_Sleep(CAN_TypeDef* CANx)
00727 {
00728   uint8_t sleepstatus = CANSLEEPFAILED;
00729   
00730   /* Check the parameters */
00731   assert_param(IS_CAN_ALL_PERIPH(CANx));
00732     
00733   /* Request Sleep mode */
00734    CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP);
00735    
00736   /* Sleep mode status */
00737   if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK)
00738   {
00739     /* Sleep mode not entered */
00740     sleepstatus =  CANSLEEPOK;
00741   }
00742   /* At this step, sleep mode status */
00743    return (uint8_t)sleepstatus;
00744 }
00745 
00746 /**
00747   * @brief  Wakes the CAN up.
00748   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00749   * @retval CANWAKEUPOK if sleep mode left, CANWAKEUPFAILED in an other case.
00750   */
00751 uint8_t CAN_WakeUp(CAN_TypeDef* CANx)
00752 {
00753   uint32_t wait_slak = SLAK_TIMEOUT;
00754   uint8_t wakeupstatus = CANWAKEUPFAILED;
00755   
00756   /* Check the parameters */
00757   assert_param(IS_CAN_ALL_PERIPH(CANx));
00758     
00759   /* Wake up request */
00760   CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP;
00761     
00762   /* Sleep mode status */
00763   while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00))
00764   {
00765    wait_slak--;
00766   }
00767   if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK)
00768   {
00769    /* Sleep mode exited */
00770     wakeupstatus = CANWAKEUPOK;
00771   }
00772   /* At this step, sleep mode status */
00773   return (uint8_t)wakeupstatus;
00774 }
00775 
00776 /**
00777   * @brief  Checks whether the specified CAN flag is set or not.
00778   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00779   * @param  CAN_FLAG: specifies the flag to check.
00780   *   This parameter can be one of the following flags: 
00781   *         - CAN_FLAG_EWG
00782   *         - CAN_FLAG_EPV 
00783   *         - CAN_FLAG_BOF
00784   *         - CAN_FLAG_RQCP0
00785   *         - CAN_FLAG_RQCP1
00786   *         - CAN_FLAG_RQCP2
00787   *         - CAN_FLAG_FMP1   
00788   *         - CAN_FLAG_FF1       
00789   *         - CAN_FLAG_FOV1   
00790   *         - CAN_FLAG_FMP0   
00791   *         - CAN_FLAG_FF0       
00792   *         - CAN_FLAG_FOV0   
00793   *         - CAN_FLAG_WKU 
00794   *         - CAN_FLAG_SLAK  
00795   *         - CAN_FLAG_LEC       
00796   * @retval The new state of CAN_FLAG (SET or RESET).
00797   */
00798 FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
00799 {
00800   FlagStatus bitstatus = RESET;
00801   
00802   /* Check the parameters */
00803   assert_param(IS_CAN_ALL_PERIPH(CANx));
00804   assert_param(IS_CAN_GET_FLAG(CAN_FLAG));
00805   
00806 
00807   if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET)
00808   { 
00809     /* Check the status of the specified CAN flag */
00810     if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00811     { 
00812       /* CAN_FLAG is set */
00813       bitstatus = SET;
00814     }
00815     else
00816     { 
00817       /* CAN_FLAG is reset */
00818       bitstatus = RESET;
00819     }
00820   }
00821   else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET)
00822   { 
00823     /* Check the status of the specified CAN flag */
00824     if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00825     { 
00826       /* CAN_FLAG is set */
00827       bitstatus = SET;
00828     }
00829     else
00830     { 
00831       /* CAN_FLAG is reset */
00832       bitstatus = RESET;
00833     }
00834   }
00835   else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET)
00836   { 
00837     /* Check the status of the specified CAN flag */
00838     if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00839     { 
00840       /* CAN_FLAG is set */
00841       bitstatus = SET;
00842     }
00843     else
00844     { 
00845       /* CAN_FLAG is reset */
00846       bitstatus = RESET;
00847     }
00848   }
00849   else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET)
00850   { 
00851     /* Check the status of the specified CAN flag */
00852     if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00853     { 
00854       /* CAN_FLAG is set */
00855       bitstatus = SET;
00856     }
00857     else
00858     { 
00859       /* CAN_FLAG is reset */
00860       bitstatus = RESET;
00861     }
00862   }
00863   else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */
00864   { 
00865     /* Check the status of the specified CAN flag */
00866     if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET)
00867     { 
00868       /* CAN_FLAG is set */
00869       bitstatus = SET;
00870     }
00871     else
00872     { 
00873       /* CAN_FLAG is reset */
00874       bitstatus = RESET;
00875     }
00876   }
00877   /* Return the CAN_FLAG status */
00878   return  bitstatus;
00879 }
00880 
00881 /**
00882   * @brief  Clears the CAN's pending flags.
00883   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00884   * @param  CAN_FLAG: specifies the flag to clear.
00885   *   This parameter can be one of the following flags: 
00886   *         - CAN_FLAG_RQCP0
00887   *         - CAN_FLAG_RQCP1
00888   *         - CAN_FLAG_RQCP2
00889   *         - CAN_FLAG_FF1       
00890   *         - CAN_FLAG_FOV1   
00891   *         - CAN_FLAG_FF0       
00892   *         - CAN_FLAG_FOV0   
00893   *         - CAN_FLAG_WKU   
00894   *         - CAN_FLAG_SLAK    
00895   *         - CAN_FLAG_LEC       
00896   * @retval None.
00897   */
00898 void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG)
00899 {
00900   uint32_t flagtmp=0;
00901   /* Check the parameters */
00902   assert_param(IS_CAN_ALL_PERIPH(CANx));
00903   assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG));
00904   
00905   if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */
00906   {
00907     /* Clear the selected CAN flags */
00908     CANx->ESR = (uint32_t)RESET;
00909   }
00910   else /* MSR or TSR or RF0R or RF1R */
00911   {
00912     flagtmp = CAN_FLAG & 0x000FFFFF;
00913 
00914     if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET)
00915     {
00916       /* Receive Flags */
00917       CANx->RF0R = (uint32_t)(flagtmp);
00918     }
00919     else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET)
00920     {
00921       /* Receive Flags */
00922       CANx->RF1R = (uint32_t)(flagtmp);
00923     }
00924     else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET)
00925     {
00926       /* Transmit Flags */
00927       CANx->TSR = (uint32_t)(flagtmp);
00928     }
00929     else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */
00930     {
00931       /* Operating mode Flags */
00932       CANx->MSR = (uint32_t)(flagtmp);
00933     }
00934   }
00935 }
00936 
00937 /**
00938   * @brief  Checks whether the specified CANx interrupt has occurred or not.
00939   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
00940   * @param  CAN_IT: specifies the CAN interrupt source to check.
00941   *   This parameter can be one of the following flags: 
00942   *         -  CAN_IT_TME               
00943   *         -  CAN_IT_FMP0              
00944   *         -  CAN_IT_FF0               
00945   *         -  CAN_IT_FOV0              
00946   *         -  CAN_IT_FMP1              
00947   *         -  CAN_IT_FF1               
00948   *         -  CAN_IT_FOV1              
00949   *         -  CAN_IT_WKU  
00950   *         -  CAN_IT_SLK  
00951   *         -  CAN_IT_EWG    
00952   *         -  CAN_IT_EPV    
00953   *         -  CAN_IT_BOF    
00954   *         -  CAN_IT_LEC    
00955   *         -  CAN_IT_ERR 
00956   * @retval The current  state of CAN_IT (SET or RESET).
00957   */
00958 ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
00959 {
00960   ITStatus itstatus = RESET;
00961   /* Check the parameters */
00962   assert_param(IS_CAN_ALL_PERIPH(CANx));
00963   assert_param(IS_CAN_IT(CAN_IT));
00964   
00965   /* check the enable interrupt bit */
00966  if((CANx->IER & CAN_IT) != RESET)
00967  {
00968    /* in case the Interrupt is enabled, .... */
00969     switch (CAN_IT)
00970     {
00971       case CAN_IT_TME:
00972                /* Check CAN_TSR_RQCPx bits */
00973               itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2);  
00974               break;
00975       case CAN_IT_FMP0:
00976                /* Check CAN_RF0R_FMP0 bit */
00977               itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0);  
00978               break;
00979       case CAN_IT_FF0:
00980                /* Check CAN_RF0R_FULL0 bit */
00981               itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0);  
00982               break;
00983       case CAN_IT_FOV0:
00984                /* Check CAN_RF0R_FOVR0 bit */
00985               itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0);  
00986               break;
00987       case CAN_IT_FMP1:
00988                /* Check CAN_RF1R_FMP1 bit */
00989               itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1);  
00990               break;
00991       case CAN_IT_FF1:
00992                /* Check CAN_RF1R_FULL1 bit */
00993               itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1);  
00994               break;
00995       case CAN_IT_FOV1:
00996                /* Check CAN_RF1R_FOVR1 bit */
00997               itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1);  
00998               break;
00999       case CAN_IT_WKU:
01000                /* Check CAN_MSR_WKUI bit */
01001               itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI);  
01002               break;
01003       case CAN_IT_SLK:
01004                /* Check CAN_MSR_SLAKI bit */
01005               itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI);  
01006               break;
01007       case CAN_IT_EWG:
01008                /* Check CAN_ESR_EWGF bit */
01009               itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF);  
01010               break;
01011       case CAN_IT_EPV:
01012                /* Check CAN_ESR_EPVF bit */
01013              itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF);  
01014               break;
01015       case CAN_IT_BOF:
01016                /* Check CAN_ESR_BOFF bit */
01017              itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF);  
01018               break;
01019       case CAN_IT_LEC:
01020                /* Check CAN_ESR_LEC bit */
01021              itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC);  
01022               break;
01023       case CAN_IT_ERR:
01024                /* Check CAN_MSR_ERRI, CAN_ESR_EWGF, CAN_ESR_EPVF, CAN_ESR_BOFF and CAN_ESR_LEC  bits */
01025               itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF|CAN_ESR_EPVF|CAN_ESR_BOFF|CAN_ESR_LEC); 
01026               itstatus |= CheckITStatus(CANx->MSR, CAN_MSR_ERRI); 
01027               break;
01028       default :
01029                /* in case of error, return RESET */
01030               itstatus = RESET;
01031               break;
01032     }
01033   }
01034   else
01035   {
01036    /* in case the Interrupt is not enabled, return RESET */
01037     itstatus  = RESET;
01038   }
01039   
01040   /* Return the CAN_IT status */
01041   return  itstatus;
01042 }
01043 
01044 /**
01045   * @brief  Clears the CANx’s interrupt pending bits.
01046   * @param  CANx: where x can be 1 or 2 to to select the CAN peripheral.
01047   * @param  CAN_IT: specifies the interrupt pending bit to clear.
01048   *         -  CAN_IT_TME                     
01049   *         -  CAN_IT_FF0               
01050   *         -  CAN_IT_FOV0                     
01051   *         -  CAN_IT_FF1               
01052   *         -  CAN_IT_FOV1              
01053   *         -  CAN_IT_WKU  
01054   *         -  CAN_IT_SLK  
01055   *         -  CAN_IT_EWG    
01056   *         -  CAN_IT_EPV    
01057   *         -  CAN_IT_BOF    
01058   *         -  CAN_IT_LEC    
01059   *         -  CAN_IT_ERR 
01060   * @retval None.
01061   */
01062 void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT)
01063 {
01064   /* Check the parameters */
01065   assert_param(IS_CAN_ALL_PERIPH(CANx));
01066   assert_param(IS_CAN_CLEAR_IT(CAN_IT));
01067 
01068   switch (CAN_IT)
01069   {
01070       case CAN_IT_TME:
01071               /* Clear CAN_TSR_RQCPx (rc_w1)*/
01072               CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2;  
01073               break;
01074       case CAN_IT_FF0:
01075               /* Clear CAN_RF0R_FULL0 (rc_w1)*/
01076               CANx->RF0R = CAN_RF0R_FULL0; 
01077               break;
01078       case CAN_IT_FOV0:
01079               /* Clear CAN_RF0R_FOVR0 (rc_w1)*/
01080               CANx->RF0R = CAN_RF0R_FOVR0; 
01081               break;
01082       case CAN_IT_FF1:
01083               /* Clear CAN_RF1R_FULL1 (rc_w1)*/
01084               CANx->RF1R = CAN_RF1R_FULL1;  
01085               break;
01086       case CAN_IT_FOV1:
01087               /* Clear CAN_RF1R_FOVR1 (rc_w1)*/
01088               CANx->RF1R = CAN_RF1R_FOVR1; 
01089               break;
01090       case CAN_IT_WKU:
01091               /* Clear CAN_MSR_WKUI (rc_w1)*/
01092               CANx->MSR = CAN_MSR_WKUI;  
01093               break;
01094       case CAN_IT_SLK:
01095               /* Clear CAN_MSR_SLAKI (rc_w1)*/ 
01096               CANx->MSR = CAN_MSR_SLAKI;   
01097               break;
01098       case CAN_IT_EWG:
01099               /* Clear CAN_MSR_ERRI (rc_w1) */
01100               CANx->MSR = CAN_MSR_ERRI;
01101               /* Note : the corresponding Flag is cleared by hardware depending of the CAN Bus status*/ 
01102               break;
01103       case CAN_IT_EPV:
01104               /* Clear CAN_MSR_ERRI (rc_w1) */
01105               CANx->MSR = CAN_MSR_ERRI; 
01106               /* Note : the corresponding Flag is cleared by hardware depending of the CAN Bus status*/
01107               break;
01108       case CAN_IT_BOF:
01109               /* Clear CAN_MSR_ERRI (rc_w1) */ 
01110               CANx->MSR = CAN_MSR_ERRI; 
01111               /* Note : the corresponding Flag is cleared by hardware depending of the CAN Bus status*/
01112               break;
01113       case CAN_IT_LEC:
01114               /*  Clear LEC bits */
01115               CANx->ESR = RESET; 
01116               /* Clear CAN_MSR_ERRI (rc_w1) */
01117               CANx->MSR = CAN_MSR_ERRI; 
01118               break;
01119       case CAN_IT_ERR:
01120               /*Clear LEC bits */
01121               CANx->ESR = RESET; 
01122               /* Clear CAN_MSR_ERRI (rc_w1) */
01123               CANx->MSR = CAN_MSR_ERRI; 
01124               /* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending of the CAN Bus status*/
01125               break;
01126       default :
01127               break;
01128    }
01129 }
01130 
01131 /**
01132   * @brief  Checks whether the CAN interrupt has occurred or not.
01133   * @param  CAN_Reg: specifies the CAN interrupt register to check.
01134   * @param  It_Bit: specifies the interrupt source bit to check.
01135   * @retval The new state of the CAN Interrupt (SET or RESET).
01136   */
01137 static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit)
01138 {
01139   ITStatus pendingbitstatus = RESET;
01140   
01141   if ((CAN_Reg & It_Bit) != (uint32_t)RESET)
01142   {
01143     /* CAN_IT is set */
01144     pendingbitstatus = SET;
01145   }
01146   else
01147   {
01148     /* CAN_IT is reset */
01149     pendingbitstatus = RESET;
01150   }
01151   return pendingbitstatus;
01152 }
01153 
01154 /**
01155   * @}
01156   */
01157 
01158 /**
01159   * @}
01160   */
01161 
01162 /**
01163   * @}
01164   */
01165 
01166 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

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