stm32f10x_adc.h

Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_adc.h
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file contains all the functions prototypes for the ADC firmware 
00008   *          library.
00009   ******************************************************************************
00010   * @copy
00011   *
00012   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00013   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00014   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00015   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00016   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00017   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00018   *
00019   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00020   */ 
00021 
00022 /* Define to prevent recursive inclusion -------------------------------------*/
00023 #ifndef __STM32F10x_ADC_H
00024 #define __STM32F10x_ADC_H
00025 
00026 #ifdef __cplusplus
00027  extern "C" {
00028 #endif
00029 
00030 /* Includes ------------------------------------------------------------------*/
00031 #include "stm32f10x.h"
00032 
00033 /** @addtogroup STM32F10x_StdPeriph_Driver
00034   * @{
00035   */
00036 
00037 /** @addtogroup ADC
00038   * @{
00039   */
00040 
00041 /** @defgroup ADC_Exported_Types
00042   * @{
00043   */
00044 
00045 /** 
00046   * @brief  ADC Init structure definition  
00047   */
00048 
00049 typedef struct
00050 {
00051   uint32_t ADC_Mode;                      /*!< Configures the ADC to operate in independent or
00052                                                dual mode. 
00053                                                This parameter can be a value of @ref ADC_mode */
00054 
00055   FunctionalState ADC_ScanConvMode;       /*!< Specifies whether the conversion is performed in
00056                                                Scan (multichannels) or Single (one channel) mode.
00057                                                This parameter can be set to ENABLE or DISABLE */
00058 
00059   FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
00060                                                Continuous or Single mode.
00061                                                This parameter can be set to ENABLE or DISABLE. */
00062 
00063   uint32_t ADC_ExternalTrigConv;          /*!< Defines the external trigger used to start the analog
00064                                                to digital conversion of regular channels. This parameter
00065                                                can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
00066 
00067   uint32_t ADC_DataAlign;                 /*!< Specifies whether the ADC data alignment is left or right.
00068                                                This parameter can be a value of @ref ADC_data_align */
00069 
00070   uint8_t ADC_NbrOfChannel;               /*!< Specifies the number of ADC channels that will be converted
00071                                                using the sequencer for regular channel group.
00072                                                This parameter must range from 1 to 16. */
00073 }ADC_InitTypeDef;
00074 /**
00075   * @}
00076   */
00077 
00078 /** @defgroup ADC_Exported_Constants
00079   * @{
00080   */
00081 
00082 #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
00083                                    ((PERIPH) == ADC2) || \
00084                                    ((PERIPH) == ADC3))
00085 
00086 #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
00087                                    ((PERIPH) == ADC3))
00088 
00089 /** @defgroup ADC_mode 
00090   * @{
00091   */
00092 
00093 #define ADC_Mode_Independent                       ((uint32_t)0x00000000)
00094 #define ADC_Mode_RegInjecSimult                    ((uint32_t)0x00010000)
00095 #define ADC_Mode_RegSimult_AlterTrig               ((uint32_t)0x00020000)
00096 #define ADC_Mode_InjecSimult_FastInterl            ((uint32_t)0x00030000)
00097 #define ADC_Mode_InjecSimult_SlowInterl            ((uint32_t)0x00040000)
00098 #define ADC_Mode_InjecSimult                       ((uint32_t)0x00050000)
00099 #define ADC_Mode_RegSimult                         ((uint32_t)0x00060000)
00100 #define ADC_Mode_FastInterl                        ((uint32_t)0x00070000)
00101 #define ADC_Mode_SlowInterl                        ((uint32_t)0x00080000)
00102 #define ADC_Mode_AlterTrig                         ((uint32_t)0x00090000)
00103 
00104 #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
00105                            ((MODE) == ADC_Mode_RegInjecSimult) || \
00106                            ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
00107                            ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
00108                            ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
00109                            ((MODE) == ADC_Mode_InjecSimult) || \
00110                            ((MODE) == ADC_Mode_RegSimult) || \
00111                            ((MODE) == ADC_Mode_FastInterl) || \
00112                            ((MODE) == ADC_Mode_SlowInterl) || \
00113                            ((MODE) == ADC_Mode_AlterTrig))
00114 /**
00115   * @}
00116   */
00117 
00118 /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion 
00119   * @{
00120   */
00121 
00122 #define ADC_ExternalTrigConv_T1_CC1                ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
00123 #define ADC_ExternalTrigConv_T1_CC2                ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
00124 #define ADC_ExternalTrigConv_T2_CC2                ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
00125 #define ADC_ExternalTrigConv_T3_TRGO               ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
00126 #define ADC_ExternalTrigConv_T4_CC4                ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
00127 #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO    ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */
00128 
00129 #define ADC_ExternalTrigConv_T1_CC3                ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
00130 #define ADC_ExternalTrigConv_None                  ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
00131 
00132 #define ADC_ExternalTrigConv_T3_CC1                ((uint32_t)0x00000000) /*!< For ADC3 only */
00133 #define ADC_ExternalTrigConv_T2_CC3                ((uint32_t)0x00020000) /*!< For ADC3 only */
00134 #define ADC_ExternalTrigConv_T8_CC1                ((uint32_t)0x00060000) /*!< For ADC3 only */
00135 #define ADC_ExternalTrigConv_T8_TRGO               ((uint32_t)0x00080000) /*!< For ADC3 only */
00136 #define ADC_ExternalTrigConv_T5_CC1                ((uint32_t)0x000A0000) /*!< For ADC3 only */
00137 #define ADC_ExternalTrigConv_T5_CC3                ((uint32_t)0x000C0000) /*!< For ADC3 only */
00138 
00139 #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
00140                                   ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
00141                                   ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
00142                                   ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
00143                                   ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
00144                                   ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
00145                                   ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
00146                                   ((REGTRIG) == ADC_ExternalTrigConv_None) || \
00147                                   ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
00148                                   ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
00149                                   ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
00150                                   ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
00151                                   ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
00152                                   ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
00153 /**
00154   * @}
00155   */
00156 
00157 /** @defgroup ADC_data_align 
00158   * @{
00159   */
00160 
00161 #define ADC_DataAlign_Right                        ((uint32_t)0x00000000)
00162 #define ADC_DataAlign_Left                         ((uint32_t)0x00000800)
00163 #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
00164                                   ((ALIGN) == ADC_DataAlign_Left))
00165 /**
00166   * @}
00167   */
00168 
00169 /** @defgroup ADC_channels 
00170   * @{
00171   */
00172 
00173 #define ADC_Channel_0                               ((uint8_t)0x00)
00174 #define ADC_Channel_1                               ((uint8_t)0x01)
00175 #define ADC_Channel_2                               ((uint8_t)0x02)
00176 #define ADC_Channel_3                               ((uint8_t)0x03)
00177 #define ADC_Channel_4                               ((uint8_t)0x04)
00178 #define ADC_Channel_5                               ((uint8_t)0x05)
00179 #define ADC_Channel_6                               ((uint8_t)0x06)
00180 #define ADC_Channel_7                               ((uint8_t)0x07)
00181 #define ADC_Channel_8                               ((uint8_t)0x08)
00182 #define ADC_Channel_9                               ((uint8_t)0x09)
00183 #define ADC_Channel_10                              ((uint8_t)0x0A)
00184 #define ADC_Channel_11                              ((uint8_t)0x0B)
00185 #define ADC_Channel_12                              ((uint8_t)0x0C)
00186 #define ADC_Channel_13                              ((uint8_t)0x0D)
00187 #define ADC_Channel_14                              ((uint8_t)0x0E)
00188 #define ADC_Channel_15                              ((uint8_t)0x0F)
00189 #define ADC_Channel_16                              ((uint8_t)0x10)
00190 #define ADC_Channel_17                              ((uint8_t)0x11)
00191 
00192 #define ADC_Channel_TempSensor                      ((uint8_t)ADC_Channel_16)
00193 #define ADC_Channel_Vrefint                         ((uint8_t)ADC_Channel_17)
00194 
00195 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
00196                                  ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
00197                                  ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
00198                                  ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
00199                                  ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
00200                                  ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
00201                                  ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
00202                                  ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
00203                                  ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
00204 /**
00205   * @}
00206   */
00207 
00208 /** @defgroup ADC_sampling_time 
00209   * @{
00210   */
00211 
00212 #define ADC_SampleTime_1Cycles5                    ((uint8_t)0x00)
00213 #define ADC_SampleTime_7Cycles5                    ((uint8_t)0x01)
00214 #define ADC_SampleTime_13Cycles5                   ((uint8_t)0x02)
00215 #define ADC_SampleTime_28Cycles5                   ((uint8_t)0x03)
00216 #define ADC_SampleTime_41Cycles5                   ((uint8_t)0x04)
00217 #define ADC_SampleTime_55Cycles5                   ((uint8_t)0x05)
00218 #define ADC_SampleTime_71Cycles5                   ((uint8_t)0x06)
00219 #define ADC_SampleTime_239Cycles5                  ((uint8_t)0x07)
00220 #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
00221                                   ((TIME) == ADC_SampleTime_7Cycles5) || \
00222                                   ((TIME) == ADC_SampleTime_13Cycles5) || \
00223                                   ((TIME) == ADC_SampleTime_28Cycles5) || \
00224                                   ((TIME) == ADC_SampleTime_41Cycles5) || \
00225                                   ((TIME) == ADC_SampleTime_55Cycles5) || \
00226                                   ((TIME) == ADC_SampleTime_71Cycles5) || \
00227                                   ((TIME) == ADC_SampleTime_239Cycles5))
00228 /**
00229   * @}
00230   */
00231 
00232 /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion 
00233   * @{
00234   */
00235 
00236 #define ADC_ExternalTrigInjecConv_T2_TRGO           ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */
00237 #define ADC_ExternalTrigInjecConv_T2_CC1            ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */
00238 #define ADC_ExternalTrigInjecConv_T3_CC4            ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */
00239 #define ADC_ExternalTrigInjecConv_T4_TRGO           ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */
00240 #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */
00241 
00242 #define ADC_ExternalTrigInjecConv_T1_TRGO           ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */
00243 #define ADC_ExternalTrigInjecConv_T1_CC4            ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */
00244 #define ADC_ExternalTrigInjecConv_None              ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */
00245 
00246 #define ADC_ExternalTrigInjecConv_T4_CC3            ((uint32_t)0x00002000) /*!< For ADC3 only */
00247 #define ADC_ExternalTrigInjecConv_T8_CC2            ((uint32_t)0x00003000) /*!< For ADC3 only */
00248 #define ADC_ExternalTrigInjecConv_T8_CC4            ((uint32_t)0x00004000) /*!< For ADC3 only */
00249 #define ADC_ExternalTrigInjecConv_T5_TRGO           ((uint32_t)0x00005000) /*!< For ADC3 only */
00250 #define ADC_ExternalTrigInjecConv_T5_CC4            ((uint32_t)0x00006000) /*!< For ADC3 only */
00251 
00252 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
00253                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
00254                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
00255                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
00256                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
00257                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
00258                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
00259                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
00260                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
00261                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
00262                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
00263                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
00264                                         ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
00265 /**
00266   * @}
00267   */
00268 
00269 /** @defgroup ADC_injected_channel_selection 
00270   * @{
00271   */
00272 
00273 #define ADC_InjectedChannel_1                       ((uint8_t)0x14)
00274 #define ADC_InjectedChannel_2                       ((uint8_t)0x18)
00275 #define ADC_InjectedChannel_3                       ((uint8_t)0x1C)
00276 #define ADC_InjectedChannel_4                       ((uint8_t)0x20)
00277 #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
00278                                           ((CHANNEL) == ADC_InjectedChannel_2) || \
00279                                           ((CHANNEL) == ADC_InjectedChannel_3) || \
00280                                           ((CHANNEL) == ADC_InjectedChannel_4))
00281 /**
00282   * @}
00283   */
00284 
00285 /** @defgroup ADC_analog_watchdog_selection 
00286   * @{
00287   */
00288 
00289 #define ADC_AnalogWatchdog_SingleRegEnable         ((uint32_t)0x00800200)
00290 #define ADC_AnalogWatchdog_SingleInjecEnable       ((uint32_t)0x00400200)
00291 #define ADC_AnalogWatchdog_SingleRegOrInjecEnable  ((uint32_t)0x00C00200)
00292 #define ADC_AnalogWatchdog_AllRegEnable            ((uint32_t)0x00800000)
00293 #define ADC_AnalogWatchdog_AllInjecEnable          ((uint32_t)0x00400000)
00294 #define ADC_AnalogWatchdog_AllRegAllInjecEnable    ((uint32_t)0x00C00000)
00295 #define ADC_AnalogWatchdog_None                    ((uint32_t)0x00000000)
00296 
00297 #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
00298                                           ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
00299                                           ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
00300                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
00301                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
00302                                           ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
00303                                           ((WATCHDOG) == ADC_AnalogWatchdog_None))
00304 /**
00305   * @}
00306   */
00307 
00308 /** @defgroup ADC_interrupts_definition 
00309   * @{
00310   */
00311 
00312 #define ADC_IT_EOC                                 ((uint16_t)0x0220)
00313 #define ADC_IT_AWD                                 ((uint16_t)0x0140)
00314 #define ADC_IT_JEOC                                ((uint16_t)0x0480)
00315 
00316 #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
00317 
00318 #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
00319                            ((IT) == ADC_IT_JEOC))
00320 /**
00321   * @}
00322   */
00323 
00324 /** @defgroup ADC_flags_definition 
00325   * @{
00326   */
00327 
00328 #define ADC_FLAG_AWD                               ((uint8_t)0x01)
00329 #define ADC_FLAG_EOC                               ((uint8_t)0x02)
00330 #define ADC_FLAG_JEOC                              ((uint8_t)0x04)
00331 #define ADC_FLAG_JSTRT                             ((uint8_t)0x08)
00332 #define ADC_FLAG_STRT                              ((uint8_t)0x10)
00333 #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
00334 #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
00335                                ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
00336                                ((FLAG) == ADC_FLAG_STRT))
00337 /**
00338   * @}
00339   */
00340 
00341 /** @defgroup ADC_thresholds 
00342   * @{
00343   */
00344 
00345 #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
00346 
00347 /**
00348   * @}
00349   */
00350 
00351 /** @defgroup ADC_injected_offset 
00352   * @{
00353   */
00354 
00355 #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
00356 
00357 /**
00358   * @}
00359   */
00360 
00361 /** @defgroup ADC_injected_length 
00362   * @{
00363   */
00364 
00365 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
00366 
00367 /**
00368   * @}
00369   */
00370 
00371 /** @defgroup ADC_injected_rank 
00372   * @{
00373   */
00374 
00375 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
00376 
00377 /**
00378   * @}
00379   */ 
00380 
00381 
00382 /** @defgroup ADC_regular_length 
00383   * @{
00384   */
00385 
00386 #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
00387 /**
00388   * @}
00389   */
00390 
00391 /** @defgroup ADC_regular_rank 
00392   * @{
00393   */
00394 
00395 #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
00396 
00397 /**
00398   * @}
00399   */
00400 
00401 /** @defgroup ADC_regular_discontinuous_mode_number 
00402   * @{
00403   */
00404 
00405 #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
00406 
00407 /**
00408   * @}
00409   */
00410 
00411 /**
00412   * @}
00413   */
00414 
00415 /** @defgroup ADC_Exported_Macros
00416   * @{
00417   */
00418 
00419 /**
00420   * @}
00421   */
00422 
00423 /** @defgroup ADC_Exported_Functions
00424   * @{
00425   */
00426 
00427 void ADC_DeInit(ADC_TypeDef* ADCx);
00428 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
00429 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
00430 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00431 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00432 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
00433 void ADC_ResetCalibration(ADC_TypeDef* ADCx);
00434 FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
00435 void ADC_StartCalibration(ADC_TypeDef* ADCx);
00436 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
00437 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00438 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
00439 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
00440 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00441 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
00442 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00443 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
00444 uint32_t ADC_GetDualModeConversionValue(void);
00445 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00446 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00447 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
00448 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00449 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
00450 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
00451 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
00452 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
00453 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
00454 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
00455 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
00456 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
00457 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
00458 void ADC_TempSensorVrefintCmd(FunctionalState NewState);
00459 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
00460 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
00461 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
00462 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
00463 
00464 #ifdef __cplusplus
00465 }
00466 #endif
00467 
00468 #endif /*__STM32F10x_ADC_H */
00469 
00470 /**
00471   * @}
00472   */
00473 
00474 /**
00475   * @}
00476   */
00477 
00478 /**
00479   * @}
00480   */
00481 
00482 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

      For complete documentation on STM32(CORTEX M3) 32-bit Microcontrollers platform visit  www.st.com/STM32