stm32f10x_adc.c

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00001 /**
00002   ******************************************************************************
00003   * @file    stm32f10x_adc.c
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   This file provides all the ADC firmware functions.
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x_adc.h"
00023 #include "stm32f10x_rcc.h"
00024 
00025 /** @addtogroup STM32F10x_StdPeriph_Driver
00026   * @{
00027   */
00028 
00029 /** @defgroup ADC 
00030   * @brief ADC driver modules
00031   * @{
00032   */
00033 
00034 /** @defgroup ADC_Private_TypesDefinitions
00035   * @{
00036   */
00037 
00038 /**
00039   * @}
00040   */
00041 
00042 /** @defgroup ADC_Private_Defines
00043   * @{
00044   */
00045 
00046 /* ADC DISCNUM mask */
00047 #define CR1_DISCNUM_Reset           ((uint32_t)0xFFFF1FFF)
00048 
00049 /* ADC DISCEN mask */
00050 #define CR1_DISCEN_Set              ((uint32_t)0x00000800)
00051 #define CR1_DISCEN_Reset            ((uint32_t)0xFFFFF7FF)
00052 
00053 /* ADC JAUTO mask */
00054 #define CR1_JAUTO_Set               ((uint32_t)0x00000400)
00055 #define CR1_JAUTO_Reset             ((uint32_t)0xFFFFFBFF)
00056 
00057 /* ADC JDISCEN mask */
00058 #define CR1_JDISCEN_Set             ((uint32_t)0x00001000)
00059 #define CR1_JDISCEN_Reset           ((uint32_t)0xFFFFEFFF)
00060 
00061 /* ADC AWDCH mask */
00062 #define CR1_AWDCH_Reset             ((uint32_t)0xFFFFFFE0)
00063 
00064 /* ADC Analog watchdog enable mode mask */
00065 #define CR1_AWDMode_Reset           ((uint32_t)0xFF3FFDFF)
00066 
00067 /* CR1 register Mask */
00068 #define CR1_CLEAR_Mask              ((uint32_t)0xFFF0FEFF)
00069 
00070 /* ADC ADON mask */
00071 #define CR2_ADON_Set                ((uint32_t)0x00000001)
00072 #define CR2_ADON_Reset              ((uint32_t)0xFFFFFFFE)
00073 
00074 /* ADC DMA mask */
00075 #define CR2_DMA_Set                 ((uint32_t)0x00000100)
00076 #define CR2_DMA_Reset               ((uint32_t)0xFFFFFEFF)
00077 
00078 /* ADC RSTCAL mask */
00079 #define CR2_RSTCAL_Set              ((uint32_t)0x00000008)
00080 
00081 /* ADC CAL mask */
00082 #define CR2_CAL_Set                 ((uint32_t)0x00000004)
00083 
00084 /* ADC SWSTART mask */
00085 #define CR2_SWSTART_Set             ((uint32_t)0x00400000)
00086 
00087 /* ADC EXTTRIG mask */
00088 #define CR2_EXTTRIG_Set             ((uint32_t)0x00100000)
00089 #define CR2_EXTTRIG_Reset           ((uint32_t)0xFFEFFFFF)
00090 
00091 /* ADC Software start mask */
00092 #define CR2_EXTTRIG_SWSTART_Set     ((uint32_t)0x00500000)
00093 #define CR2_EXTTRIG_SWSTART_Reset   ((uint32_t)0xFFAFFFFF)
00094 
00095 /* ADC JEXTSEL mask */
00096 #define CR2_JEXTSEL_Reset           ((uint32_t)0xFFFF8FFF)
00097 
00098 /* ADC JEXTTRIG mask */
00099 #define CR2_JEXTTRIG_Set            ((uint32_t)0x00008000)
00100 #define CR2_JEXTTRIG_Reset          ((uint32_t)0xFFFF7FFF)
00101 
00102 /* ADC JSWSTART mask */
00103 #define CR2_JSWSTART_Set            ((uint32_t)0x00200000)
00104 
00105 /* ADC injected software start mask */
00106 #define CR2_JEXTTRIG_JSWSTART_Set   ((uint32_t)0x00208000)
00107 #define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF)
00108 
00109 /* ADC TSPD mask */
00110 #define CR2_TSVREFE_Set             ((uint32_t)0x00800000)
00111 #define CR2_TSVREFE_Reset           ((uint32_t)0xFF7FFFFF)
00112 
00113 /* CR2 register Mask */
00114 #define CR2_CLEAR_Mask              ((uint32_t)0xFFF1F7FD)
00115 
00116 /* ADC SQx mask */
00117 #define SQR3_SQ_Set                 ((uint32_t)0x0000001F)
00118 #define SQR2_SQ_Set                 ((uint32_t)0x0000001F)
00119 #define SQR1_SQ_Set                 ((uint32_t)0x0000001F)
00120 
00121 /* SQR1 register Mask */
00122 #define SQR1_CLEAR_Mask             ((uint32_t)0xFF0FFFFF)
00123 
00124 /* ADC JSQx mask */
00125 #define JSQR_JSQ_Set                ((uint32_t)0x0000001F)
00126 
00127 /* ADC JL mask */
00128 #define JSQR_JL_Set                 ((uint32_t)0x00300000)
00129 #define JSQR_JL_Reset               ((uint32_t)0xFFCFFFFF)
00130 
00131 /* ADC SMPx mask */
00132 #define SMPR1_SMP_Set               ((uint32_t)0x00000007)
00133 #define SMPR2_SMP_Set               ((uint32_t)0x00000007)
00134 
00135 /* ADC JDRx registers offset */
00136 #define JDR_Offset                  ((uint8_t)0x28)
00137 
00138 /* ADC1 DR register base address */
00139 #define DR_ADDRESS                  ((uint32_t)0x4001244C)
00140 
00141 /**
00142   * @}
00143   */
00144 
00145 /** @defgroup ADC_Private_Macros
00146   * @{
00147   */
00148 
00149 /**
00150   * @}
00151   */
00152 
00153 /** @defgroup ADC_Private_Variables
00154   * @{
00155   */
00156 
00157 /**
00158   * @}
00159   */
00160 
00161 /** @defgroup ADC_Private_FunctionPrototypes
00162   * @{
00163   */
00164 
00165 /**
00166   * @}
00167   */
00168 
00169 /** @defgroup ADC_Private_Functions
00170   * @{
00171   */
00172 
00173 /**
00174   * @brief  Deinitializes the ADCx peripheral registers to their default reset values.
00175   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00176   * @retval None
00177   */
00178 void ADC_DeInit(ADC_TypeDef* ADCx)
00179 {
00180   /* Check the parameters */
00181   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00182   
00183   if (ADCx == ADC1)
00184   {
00185     /* Enable ADC1 reset state */
00186     RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
00187     /* Release ADC1 from reset state */
00188     RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
00189   }
00190   else if (ADCx == ADC2)
00191   {
00192     /* Enable ADC2 reset state */
00193     RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
00194     /* Release ADC2 from reset state */
00195     RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
00196   }
00197   else
00198   {
00199     if (ADCx == ADC3)
00200     {
00201       /* Enable ADC3 reset state */
00202       RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
00203       /* Release ADC3 from reset state */
00204       RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
00205     }
00206   }
00207 }
00208 
00209 /**
00210   * @brief  Initializes the ADCx peripheral according to the specified parameters
00211   *   in the ADC_InitStruct.
00212   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00213   * @param  ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
00214   *   the configuration information for the specified ADC peripheral.
00215   * @retval None
00216   */
00217 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
00218 {
00219   uint32_t tmpreg1 = 0;
00220   uint8_t tmpreg2 = 0;
00221   /* Check the parameters */
00222   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00223   assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
00224   assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
00225   assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
00226   assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));   
00227   assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); 
00228   assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
00229 
00230   /*---------------------------- ADCx CR1 Configuration -----------------*/
00231   /* Get the ADCx CR1 value */
00232   tmpreg1 = ADCx->CR1;
00233   /* Clear DUALMOD and SCAN bits */
00234   tmpreg1 &= CR1_CLEAR_Mask;
00235   /* Configure ADCx: Dual mode and scan conversion mode */
00236   /* Set DUALMOD bits according to ADC_Mode value */
00237   /* Set SCAN bit according to ADC_ScanConvMode value */
00238   tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8));
00239   /* Write to ADCx CR1 */
00240   ADCx->CR1 = tmpreg1;
00241 
00242   /*---------------------------- ADCx CR2 Configuration -----------------*/
00243   /* Get the ADCx CR2 value */
00244   tmpreg1 = ADCx->CR2;
00245   /* Clear CONT, ALIGN and EXTSEL bits */
00246   tmpreg1 &= CR2_CLEAR_Mask;
00247   /* Configure ADCx: external trigger event and continuous conversion mode */
00248   /* Set ALIGN bit according to ADC_DataAlign value */
00249   /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
00250   /* Set CONT bit according to ADC_ContinuousConvMode value */
00251   tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
00252             ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1));
00253   /* Write to ADCx CR2 */
00254   ADCx->CR2 = tmpreg1;
00255 
00256   /*---------------------------- ADCx SQR1 Configuration -----------------*/
00257   /* Get the ADCx SQR1 value */
00258   tmpreg1 = ADCx->SQR1;
00259   /* Clear L bits */
00260   tmpreg1 &= SQR1_CLEAR_Mask;
00261   /* Configure ADCx: regular channel sequence length */
00262   /* Set L bits according to ADC_NbrOfChannel value */
00263   tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1);
00264   tmpreg1 |= (uint32_t)tmpreg2 << 20;
00265   /* Write to ADCx SQR1 */
00266   ADCx->SQR1 = tmpreg1;
00267 }
00268 
00269 /**
00270   * @brief  Fills each ADC_InitStruct member with its default value.
00271   * @param  ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized.
00272   * @retval None
00273   */
00274 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
00275 {
00276   /* Reset ADC init structure parameters values */
00277   /* Initialize the ADC_Mode member */
00278   ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
00279   /* initialize the ADC_ScanConvMode member */
00280   ADC_InitStruct->ADC_ScanConvMode = DISABLE;
00281   /* Initialize the ADC_ContinuousConvMode member */
00282   ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
00283   /* Initialize the ADC_ExternalTrigConv member */
00284   ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
00285   /* Initialize the ADC_DataAlign member */
00286   ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
00287   /* Initialize the ADC_NbrOfChannel member */
00288   ADC_InitStruct->ADC_NbrOfChannel = 1;
00289 }
00290 
00291 /**
00292   * @brief  Enables or disables the specified ADC peripheral.
00293   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00294   * @param  NewState: new state of the ADCx peripheral.
00295   *   This parameter can be: ENABLE or DISABLE.
00296   * @retval None
00297   */
00298 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00299 {
00300   /* Check the parameters */
00301   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00302   assert_param(IS_FUNCTIONAL_STATE(NewState));
00303   if (NewState != DISABLE)
00304   {
00305     /* Set the ADON bit to wake up the ADC from power down mode */
00306     ADCx->CR2 |= CR2_ADON_Set;
00307   }
00308   else
00309   {
00310     /* Disable the selected ADC peripheral */
00311     ADCx->CR2 &= CR2_ADON_Reset;
00312   }
00313 }
00314 
00315 /**
00316   * @brief  Enables or disables the specified ADC DMA request.
00317   * @param  ADCx: where x can be 1 or 3 to select the ADC peripheral.
00318   *   Note: ADC2 hasn't a DMA capability.
00319   * @param  NewState: new state of the selected ADC DMA transfer.
00320   *   This parameter can be: ENABLE or DISABLE.
00321   * @retval None
00322   */
00323 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00324 {
00325   /* Check the parameters */
00326   assert_param(IS_ADC_DMA_PERIPH(ADCx));
00327   assert_param(IS_FUNCTIONAL_STATE(NewState));
00328   if (NewState != DISABLE)
00329   {
00330     /* Enable the selected ADC DMA request */
00331     ADCx->CR2 |= CR2_DMA_Set;
00332   }
00333   else
00334   {
00335     /* Disable the selected ADC DMA request */
00336     ADCx->CR2 &= CR2_DMA_Reset;
00337   }
00338 }
00339 
00340 /**
00341   * @brief  Enables or disables the specified ADC interrupts.
00342   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00343   * @param  ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. 
00344   *   This parameter can be any combination of the following values:
00345   *     @arg ADC_IT_EOC: End of conversion interrupt mask
00346   *     @arg ADC_IT_AWD: Analog watchdog interrupt mask
00347   *     @arg ADC_IT_JEOC: End of injected conversion interrupt mask
00348   * @param  NewState: new state of the specified ADC interrupts.
00349   *   This parameter can be: ENABLE or DISABLE.
00350   * @retval None
00351   */
00352 void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState)
00353 {
00354   uint8_t itmask = 0;
00355   /* Check the parameters */
00356   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00357   assert_param(IS_FUNCTIONAL_STATE(NewState));
00358   assert_param(IS_ADC_IT(ADC_IT));
00359   /* Get the ADC IT index */
00360   itmask = (uint8_t)ADC_IT;
00361   if (NewState != DISABLE)
00362   {
00363     /* Enable the selected ADC interrupts */
00364     ADCx->CR1 |= itmask;
00365   }
00366   else
00367   {
00368     /* Disable the selected ADC interrupts */
00369     ADCx->CR1 &= (~(uint32_t)itmask);
00370   }
00371 }
00372 
00373 /**
00374   * @brief  Resets the selected ADC calibration registers.
00375   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00376   * @retval None
00377   */
00378 void ADC_ResetCalibration(ADC_TypeDef* ADCx)
00379 {
00380   /* Check the parameters */
00381   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00382   /* Resets the selected ADC calibartion registers */  
00383   ADCx->CR2 |= CR2_RSTCAL_Set;
00384 }
00385 
00386 /**
00387   * @brief  Gets the selected ADC reset calibration registers status.
00388   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00389   * @retval The new state of ADC reset calibration registers (SET or RESET).
00390   */
00391 FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx)
00392 {
00393   FlagStatus bitstatus = RESET;
00394   /* Check the parameters */
00395   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00396   /* Check the status of RSTCAL bit */
00397   if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET)
00398   {
00399     /* RSTCAL bit is set */
00400     bitstatus = SET;
00401   }
00402   else
00403   {
00404     /* RSTCAL bit is reset */
00405     bitstatus = RESET;
00406   }
00407   /* Return the RSTCAL bit status */
00408   return  bitstatus;
00409 }
00410 
00411 /**
00412   * @brief  Starts the selected ADC calibration process.
00413   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00414   * @retval None
00415   */
00416 void ADC_StartCalibration(ADC_TypeDef* ADCx)
00417 {
00418   /* Check the parameters */
00419   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00420   /* Enable the selected ADC calibration process */  
00421   ADCx->CR2 |= CR2_CAL_Set;
00422 }
00423 
00424 /**
00425   * @brief  Gets the selected ADC calibration status.
00426   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00427   * @retval The new state of ADC calibration (SET or RESET).
00428   */
00429 FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx)
00430 {
00431   FlagStatus bitstatus = RESET;
00432   /* Check the parameters */
00433   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00434   /* Check the status of CAL bit */
00435   if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET)
00436   {
00437     /* CAL bit is set: calibration on going */
00438     bitstatus = SET;
00439   }
00440   else
00441   {
00442     /* CAL bit is reset: end of calibration */
00443     bitstatus = RESET;
00444   }
00445   /* Return the CAL bit status */
00446   return  bitstatus;
00447 }
00448 
00449 /**
00450   * @brief  Enables or disables the selected ADC software start conversion .
00451   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00452   * @param  NewState: new state of the selected ADC software start conversion.
00453   *   This parameter can be: ENABLE or DISABLE.
00454   * @retval None
00455   */
00456 void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00457 {
00458   /* Check the parameters */
00459   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00460   assert_param(IS_FUNCTIONAL_STATE(NewState));
00461   if (NewState != DISABLE)
00462   {
00463     /* Enable the selected ADC conversion on external event and start the selected
00464        ADC conversion */
00465     ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set;
00466   }
00467   else
00468   {
00469     /* Disable the selected ADC conversion on external event and stop the selected
00470        ADC conversion */
00471     ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset;
00472   }
00473 }
00474 
00475 /**
00476   * @brief  Gets the selected ADC Software start conversion Status.
00477   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00478   * @retval The new state of ADC software start conversion (SET or RESET).
00479   */
00480 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
00481 {
00482   FlagStatus bitstatus = RESET;
00483   /* Check the parameters */
00484   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00485   /* Check the status of SWSTART bit */
00486   if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET)
00487   {
00488     /* SWSTART bit is set */
00489     bitstatus = SET;
00490   }
00491   else
00492   {
00493     /* SWSTART bit is reset */
00494     bitstatus = RESET;
00495   }
00496   /* Return the SWSTART bit status */
00497   return  bitstatus;
00498 }
00499 
00500 /**
00501   * @brief  Configures the discontinuous mode for the selected ADC regular
00502   *   group channel.
00503   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00504   * @param  Number: specifies the discontinuous mode regular channel
00505   *   count value. This number must be between 1 and 8.
00506   * @retval None
00507   */
00508 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number)
00509 {
00510   uint32_t tmpreg1 = 0;
00511   uint32_t tmpreg2 = 0;
00512   /* Check the parameters */
00513   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00514   assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
00515   /* Get the old register value */
00516   tmpreg1 = ADCx->CR1;
00517   /* Clear the old discontinuous mode channel count */
00518   tmpreg1 &= CR1_DISCNUM_Reset;
00519   /* Set the discontinuous mode channel count */
00520   tmpreg2 = Number - 1;
00521   tmpreg1 |= tmpreg2 << 13;
00522   /* Store the new register value */
00523   ADCx->CR1 = tmpreg1;
00524 }
00525 
00526 /**
00527   * @brief  Enables or disables the discontinuous mode on regular group
00528   *   channel for the specified ADC
00529   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00530   * @param  NewState: new state of the selected ADC discontinuous mode
00531   *   on regular group channel.
00532   *   This parameter can be: ENABLE or DISABLE.
00533   * @retval None
00534   */
00535 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00536 {
00537   /* Check the parameters */
00538   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00539   assert_param(IS_FUNCTIONAL_STATE(NewState));
00540   if (NewState != DISABLE)
00541   {
00542     /* Enable the selected ADC regular discontinuous mode */
00543     ADCx->CR1 |= CR1_DISCEN_Set;
00544   }
00545   else
00546   {
00547     /* Disable the selected ADC regular discontinuous mode */
00548     ADCx->CR1 &= CR1_DISCEN_Reset;
00549   }
00550 }
00551 
00552 /**
00553   * @brief  Configures for the selected ADC regular channel its corresponding
00554   *   rank in the sequencer and its sample time.
00555   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00556   * @param  ADC_Channel: the ADC channel to configure. 
00557   *   This parameter can be one of the following values:
00558   *     @arg ADC_Channel_0: ADC Channel0 selected
00559   *     @arg ADC_Channel_1: ADC Channel1 selected
00560   *     @arg ADC_Channel_2: ADC Channel2 selected
00561   *     @arg ADC_Channel_3: ADC Channel3 selected
00562   *     @arg ADC_Channel_4: ADC Channel4 selected
00563   *     @arg ADC_Channel_5: ADC Channel5 selected
00564   *     @arg ADC_Channel_6: ADC Channel6 selected
00565   *     @arg ADC_Channel_7: ADC Channel7 selected
00566   *     @arg ADC_Channel_8: ADC Channel8 selected
00567   *     @arg ADC_Channel_9: ADC Channel9 selected
00568   *     @arg ADC_Channel_10: ADC Channel10 selected
00569   *     @arg ADC_Channel_11: ADC Channel11 selected
00570   *     @arg ADC_Channel_12: ADC Channel12 selected
00571   *     @arg ADC_Channel_13: ADC Channel13 selected
00572   *     @arg ADC_Channel_14: ADC Channel14 selected
00573   *     @arg ADC_Channel_15: ADC Channel15 selected
00574   *     @arg ADC_Channel_16: ADC Channel16 selected
00575   *     @arg ADC_Channel_17: ADC Channel17 selected
00576   * @param  Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16.
00577   * @param  ADC_SampleTime: The sample time value to be set for the selected channel. 
00578   *   This parameter can be one of the following values:
00579   *     @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
00580   *     @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
00581   *     @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
00582   *     @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles 
00583   *     @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles 
00584   *     @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles 
00585   *     @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles 
00586   *     @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles       
00587   * @retval None
00588   */
00589 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
00590 {
00591   uint32_t tmpreg1 = 0, tmpreg2 = 0;
00592   /* Check the parameters */
00593   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00594   assert_param(IS_ADC_CHANNEL(ADC_Channel));
00595   assert_param(IS_ADC_REGULAR_RANK(Rank));
00596   assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
00597   /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
00598   if (ADC_Channel > ADC_Channel_9)
00599   {
00600     /* Get the old register value */
00601     tmpreg1 = ADCx->SMPR1;
00602     /* Calculate the mask to clear */
00603     tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
00604     /* Clear the old channel sample time */
00605     tmpreg1 &= ~tmpreg2;
00606     /* Calculate the mask to set */
00607     tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10));
00608     /* Set the new channel sample time */
00609     tmpreg1 |= tmpreg2;
00610     /* Store the new register value */
00611     ADCx->SMPR1 = tmpreg1;
00612   }
00613   else /* ADC_Channel include in ADC_Channel_[0..9] */
00614   {
00615     /* Get the old register value */
00616     tmpreg1 = ADCx->SMPR2;
00617     /* Calculate the mask to clear */
00618     tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
00619     /* Clear the old channel sample time */
00620     tmpreg1 &= ~tmpreg2;
00621     /* Calculate the mask to set */
00622     tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
00623     /* Set the new channel sample time */
00624     tmpreg1 |= tmpreg2;
00625     /* Store the new register value */
00626     ADCx->SMPR2 = tmpreg1;
00627   }
00628   /* For Rank 1 to 6 */
00629   if (Rank < 7)
00630   {
00631     /* Get the old register value */
00632     tmpreg1 = ADCx->SQR3;
00633     /* Calculate the mask to clear */
00634     tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1));
00635     /* Clear the old SQx bits for the selected rank */
00636     tmpreg1 &= ~tmpreg2;
00637     /* Calculate the mask to set */
00638     tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1));
00639     /* Set the SQx bits for the selected rank */
00640     tmpreg1 |= tmpreg2;
00641     /* Store the new register value */
00642     ADCx->SQR3 = tmpreg1;
00643   }
00644   /* For Rank 7 to 12 */
00645   else if (Rank < 13)
00646   {
00647     /* Get the old register value */
00648     tmpreg1 = ADCx->SQR2;
00649     /* Calculate the mask to clear */
00650     tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7));
00651     /* Clear the old SQx bits for the selected rank */
00652     tmpreg1 &= ~tmpreg2;
00653     /* Calculate the mask to set */
00654     tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7));
00655     /* Set the SQx bits for the selected rank */
00656     tmpreg1 |= tmpreg2;
00657     /* Store the new register value */
00658     ADCx->SQR2 = tmpreg1;
00659   }
00660   /* For Rank 13 to 16 */
00661   else
00662   {
00663     /* Get the old register value */
00664     tmpreg1 = ADCx->SQR1;
00665     /* Calculate the mask to clear */
00666     tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13));
00667     /* Clear the old SQx bits for the selected rank */
00668     tmpreg1 &= ~tmpreg2;
00669     /* Calculate the mask to set */
00670     tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13));
00671     /* Set the SQx bits for the selected rank */
00672     tmpreg1 |= tmpreg2;
00673     /* Store the new register value */
00674     ADCx->SQR1 = tmpreg1;
00675   }
00676 }
00677 
00678 /**
00679   * @brief  Enables or disables the ADCx conversion through external trigger.
00680   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00681   * @param  NewState: new state of the selected ADC external trigger start of conversion.
00682   *   This parameter can be: ENABLE or DISABLE.
00683   * @retval None
00684   */
00685 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00686 {
00687   /* Check the parameters */
00688   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00689   assert_param(IS_FUNCTIONAL_STATE(NewState));
00690   if (NewState != DISABLE)
00691   {
00692     /* Enable the selected ADC conversion on external event */
00693     ADCx->CR2 |= CR2_EXTTRIG_Set;
00694   }
00695   else
00696   {
00697     /* Disable the selected ADC conversion on external event */
00698     ADCx->CR2 &= CR2_EXTTRIG_Reset;
00699   }
00700 }
00701 
00702 /**
00703   * @brief  Returns the last ADCx conversion result data for regular channel.
00704   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00705   * @retval The Data conversion value.
00706   */
00707 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
00708 {
00709   /* Check the parameters */
00710   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00711   /* Return the selected ADC conversion value */
00712   return (uint16_t) ADCx->DR;
00713 }
00714 
00715 /**
00716   * @brief  Returns the last ADC1 and ADC2 conversion result data in dual mode.
00717   * @retval The Data conversion value.
00718   */
00719 uint32_t ADC_GetDualModeConversionValue(void)
00720 {
00721   /* Return the dual mode conversion value */
00722   return (*(__IO uint32_t *) DR_ADDRESS);
00723 }
00724 
00725 /**
00726   * @brief  Enables or disables the selected ADC automatic injected group
00727   *   conversion after regular one.
00728   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00729   * @param  NewState: new state of the selected ADC auto injected conversion
00730   *   This parameter can be: ENABLE or DISABLE.
00731   * @retval None
00732   */
00733 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00734 {
00735   /* Check the parameters */
00736   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00737   assert_param(IS_FUNCTIONAL_STATE(NewState));
00738   if (NewState != DISABLE)
00739   {
00740     /* Enable the selected ADC automatic injected group conversion */
00741     ADCx->CR1 |= CR1_JAUTO_Set;
00742   }
00743   else
00744   {
00745     /* Disable the selected ADC automatic injected group conversion */
00746     ADCx->CR1 &= CR1_JAUTO_Reset;
00747   }
00748 }
00749 
00750 /**
00751   * @brief  Enables or disables the discontinuous mode for injected group
00752   *   channel for the specified ADC
00753   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00754   * @param  NewState: new state of the selected ADC discontinuous mode
00755   *   on injected group channel.
00756   *   This parameter can be: ENABLE or DISABLE.
00757   * @retval None
00758   */
00759 void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00760 {
00761   /* Check the parameters */
00762   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00763   assert_param(IS_FUNCTIONAL_STATE(NewState));
00764   if (NewState != DISABLE)
00765   {
00766     /* Enable the selected ADC injected discontinuous mode */
00767     ADCx->CR1 |= CR1_JDISCEN_Set;
00768   }
00769   else
00770   {
00771     /* Disable the selected ADC injected discontinuous mode */
00772     ADCx->CR1 &= CR1_JDISCEN_Reset;
00773   }
00774 }
00775 
00776 /**
00777   * @brief  Configures the ADCx external trigger for injected channels conversion.
00778   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00779   * @param  ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. 
00780   *   This parameter can be one of the following values:
00781   *     @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3)
00782   *     @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3)
00783   *     @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2)
00784   *     @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2)
00785   *     @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2)
00786   *     @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2)
00787   *     @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8
00788   *                                                       capture compare4 event selected (for ADC1 and ADC2)                       
00789   *     @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only)
00790   *     @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only)                         
00791   *     @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only)
00792   *     @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only)                         
00793   *     @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only)                        
00794   *     @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not
00795   *                                          by external trigger (for ADC1, ADC2 and ADC3)
00796   * @retval None
00797   */
00798 void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv)
00799 {
00800   uint32_t tmpreg = 0;
00801   /* Check the parameters */
00802   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00803   assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
00804   /* Get the old register value */
00805   tmpreg = ADCx->CR2;
00806   /* Clear the old external event selection for injected group */
00807   tmpreg &= CR2_JEXTSEL_Reset;
00808   /* Set the external event selection for injected group */
00809   tmpreg |= ADC_ExternalTrigInjecConv;
00810   /* Store the new register value */
00811   ADCx->CR2 = tmpreg;
00812 }
00813 
00814 /**
00815   * @brief  Enables or disables the ADCx injected channels conversion through
00816   *   external trigger
00817   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00818   * @param  NewState: new state of the selected ADC external trigger start of
00819   *   injected conversion.
00820   *   This parameter can be: ENABLE or DISABLE.
00821   * @retval None
00822   */
00823 void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00824 {
00825   /* Check the parameters */
00826   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00827   assert_param(IS_FUNCTIONAL_STATE(NewState));
00828   if (NewState != DISABLE)
00829   {
00830     /* Enable the selected ADC external event selection for injected group */
00831     ADCx->CR2 |= CR2_JEXTTRIG_Set;
00832   }
00833   else
00834   {
00835     /* Disable the selected ADC external event selection for injected group */
00836     ADCx->CR2 &= CR2_JEXTTRIG_Reset;
00837   }
00838 }
00839 
00840 /**
00841   * @brief  Enables or disables the selected ADC start of the injected 
00842   *   channels conversion.
00843   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00844   * @param  NewState: new state of the selected ADC software start injected conversion.
00845   *   This parameter can be: ENABLE or DISABLE.
00846   * @retval None
00847   */
00848 void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
00849 {
00850   /* Check the parameters */
00851   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00852   assert_param(IS_FUNCTIONAL_STATE(NewState));
00853   if (NewState != DISABLE)
00854   {
00855     /* Enable the selected ADC conversion for injected group on external event and start the selected
00856        ADC injected conversion */
00857     ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set;
00858   }
00859   else
00860   {
00861     /* Disable the selected ADC conversion on external event for injected group and stop the selected
00862        ADC injected conversion */
00863     ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset;
00864   }
00865 }
00866 
00867 /**
00868   * @brief  Gets the selected ADC Software start injected conversion Status.
00869   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00870   * @retval The new state of ADC software start injected conversion (SET or RESET).
00871   */
00872 FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
00873 {
00874   FlagStatus bitstatus = RESET;
00875   /* Check the parameters */
00876   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00877   /* Check the status of JSWSTART bit */
00878   if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET)
00879   {
00880     /* JSWSTART bit is set */
00881     bitstatus = SET;
00882   }
00883   else
00884   {
00885     /* JSWSTART bit is reset */
00886     bitstatus = RESET;
00887   }
00888   /* Return the JSWSTART bit status */
00889   return  bitstatus;
00890 }
00891 
00892 /**
00893   * @brief  Configures for the selected ADC injected channel its corresponding
00894   *   rank in the sequencer and its sample time.
00895   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00896   * @param  ADC_Channel: the ADC channel to configure. 
00897   *   This parameter can be one of the following values:
00898   *     @arg ADC_Channel_0: ADC Channel0 selected
00899   *     @arg ADC_Channel_1: ADC Channel1 selected
00900   *     @arg ADC_Channel_2: ADC Channel2 selected
00901   *     @arg ADC_Channel_3: ADC Channel3 selected
00902   *     @arg ADC_Channel_4: ADC Channel4 selected
00903   *     @arg ADC_Channel_5: ADC Channel5 selected
00904   *     @arg ADC_Channel_6: ADC Channel6 selected
00905   *     @arg ADC_Channel_7: ADC Channel7 selected
00906   *     @arg ADC_Channel_8: ADC Channel8 selected
00907   *     @arg ADC_Channel_9: ADC Channel9 selected
00908   *     @arg ADC_Channel_10: ADC Channel10 selected
00909   *     @arg ADC_Channel_11: ADC Channel11 selected
00910   *     @arg ADC_Channel_12: ADC Channel12 selected
00911   *     @arg ADC_Channel_13: ADC Channel13 selected
00912   *     @arg ADC_Channel_14: ADC Channel14 selected
00913   *     @arg ADC_Channel_15: ADC Channel15 selected
00914   *     @arg ADC_Channel_16: ADC Channel16 selected
00915   *     @arg ADC_Channel_17: ADC Channel17 selected
00916   * @param  Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4.
00917   * @param  ADC_SampleTime: The sample time value to be set for the selected channel. 
00918   *   This parameter can be one of the following values:
00919   *     @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
00920   *     @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
00921   *     @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
00922   *     @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles 
00923   *     @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles 
00924   *     @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles 
00925   *     @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles 
00926   *     @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles       
00927   * @retval None
00928   */
00929 void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
00930 {
00931   uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0;
00932   /* Check the parameters */
00933   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00934   assert_param(IS_ADC_CHANNEL(ADC_Channel));
00935   assert_param(IS_ADC_INJECTED_RANK(Rank));
00936   assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
00937   /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
00938   if (ADC_Channel > ADC_Channel_9)
00939   {
00940     /* Get the old register value */
00941     tmpreg1 = ADCx->SMPR1;
00942     /* Calculate the mask to clear */
00943     tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10));
00944     /* Clear the old channel sample time */
00945     tmpreg1 &= ~tmpreg2;
00946     /* Calculate the mask to set */
00947     tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10));
00948     /* Set the new channel sample time */
00949     tmpreg1 |= tmpreg2;
00950     /* Store the new register value */
00951     ADCx->SMPR1 = tmpreg1;
00952   }
00953   else /* ADC_Channel include in ADC_Channel_[0..9] */
00954   {
00955     /* Get the old register value */
00956     tmpreg1 = ADCx->SMPR2;
00957     /* Calculate the mask to clear */
00958     tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
00959     /* Clear the old channel sample time */
00960     tmpreg1 &= ~tmpreg2;
00961     /* Calculate the mask to set */
00962     tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel);
00963     /* Set the new channel sample time */
00964     tmpreg1 |= tmpreg2;
00965     /* Store the new register value */
00966     ADCx->SMPR2 = tmpreg1;
00967   }
00968   /* Rank configuration */
00969   /* Get the old register value */
00970   tmpreg1 = ADCx->JSQR;
00971   /* Get JL value: Number = JL+1 */
00972   tmpreg3 =  (tmpreg1 & JSQR_JL_Set)>> 20;
00973   /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */
00974   tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
00975   /* Clear the old JSQx bits for the selected rank */
00976   tmpreg1 &= ~tmpreg2;
00977   /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */
00978   tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1)));
00979   /* Set the JSQx bits for the selected rank */
00980   tmpreg1 |= tmpreg2;
00981   /* Store the new register value */
00982   ADCx->JSQR = tmpreg1;
00983 }
00984 
00985 /**
00986   * @brief  Configures the sequencer length for injected channels
00987   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
00988   * @param  Length: The sequencer length. 
00989   *   This parameter must be a number between 1 to 4.
00990   * @retval None
00991   */
00992 void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length)
00993 {
00994   uint32_t tmpreg1 = 0;
00995   uint32_t tmpreg2 = 0;
00996   /* Check the parameters */
00997   assert_param(IS_ADC_ALL_PERIPH(ADCx));
00998   assert_param(IS_ADC_INJECTED_LENGTH(Length));
00999   
01000   /* Get the old register value */
01001   tmpreg1 = ADCx->JSQR;
01002   /* Clear the old injected sequnence lenght JL bits */
01003   tmpreg1 &= JSQR_JL_Reset;
01004   /* Set the injected sequnence lenght JL bits */
01005   tmpreg2 = Length - 1; 
01006   tmpreg1 |= tmpreg2 << 20;
01007   /* Store the new register value */
01008   ADCx->JSQR = tmpreg1;
01009 }
01010 
01011 /**
01012   * @brief  Set the injected channels conversion value offset
01013   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01014   * @param  ADC_InjectedChannel: the ADC injected channel to set its offset. 
01015   *   This parameter can be one of the following values:
01016   *     @arg ADC_InjectedChannel_1: Injected Channel1 selected
01017   *     @arg ADC_InjectedChannel_2: Injected Channel2 selected
01018   *     @arg ADC_InjectedChannel_3: Injected Channel3 selected
01019   *     @arg ADC_InjectedChannel_4: Injected Channel4 selected
01020   * @param  Offset: the offset value for the selected ADC injected channel
01021   *   This parameter must be a 12bit value.
01022   * @retval None
01023   */
01024 void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset)
01025 {
01026   __IO uint32_t tmp = 0;
01027   
01028   /* Check the parameters */
01029   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01030   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
01031   assert_param(IS_ADC_OFFSET(Offset));  
01032   
01033   tmp = (uint32_t)ADCx;
01034   tmp += ADC_InjectedChannel;
01035   
01036   /* Set the selected injected channel data offset */
01037   *(__IO uint32_t *) tmp = (uint32_t)Offset;
01038 }
01039 
01040 /**
01041   * @brief  Returns the ADC injected channel conversion result
01042   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01043   * @param  ADC_InjectedChannel: the converted ADC injected channel.
01044   *   This parameter can be one of the following values:
01045   *     @arg ADC_InjectedChannel_1: Injected Channel1 selected
01046   *     @arg ADC_InjectedChannel_2: Injected Channel2 selected
01047   *     @arg ADC_InjectedChannel_3: Injected Channel3 selected
01048   *     @arg ADC_InjectedChannel_4: Injected Channel4 selected
01049   * @retval The Data conversion value.
01050   */
01051 uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel)
01052 {
01053   __IO uint32_t tmp = 0;
01054   
01055   /* Check the parameters */
01056   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01057   assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
01058 
01059   tmp = (uint32_t)ADCx;
01060   tmp += ADC_InjectedChannel + JDR_Offset;
01061   
01062   /* Returns the selected injected channel conversion data value */
01063   return (uint16_t) (*(__IO uint32_t*)  tmp);   
01064 }
01065 
01066 /**
01067   * @brief  Enables or disables the analog watchdog on single/all regular
01068   *   or injected channels
01069   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01070   * @param  ADC_AnalogWatchdog: the ADC analog watchdog configuration.
01071   *   This parameter can be one of the following values:
01072   *     @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel
01073   *     @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel
01074   *     @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel
01075   *     @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on  all regular channel
01076   *     @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on  all injected channel
01077   *     @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels
01078   *     @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog
01079   * @retval None          
01080   */
01081 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog)
01082 {
01083   uint32_t tmpreg = 0;
01084   /* Check the parameters */
01085   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01086   assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
01087   /* Get the old register value */
01088   tmpreg = ADCx->CR1;
01089   /* Clear AWDEN, AWDENJ and AWDSGL bits */
01090   tmpreg &= CR1_AWDMode_Reset;
01091   /* Set the analog watchdog enable mode */
01092   tmpreg |= ADC_AnalogWatchdog;
01093   /* Store the new register value */
01094   ADCx->CR1 = tmpreg;
01095 }
01096 
01097 /**
01098   * @brief  Configures the high and low thresholds of the analog watchdog.
01099   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01100   * @param  HighThreshold: the ADC analog watchdog High threshold value.
01101   *   This parameter must be a 12bit value.
01102   * @param  LowThreshold: the ADC analog watchdog Low threshold value.
01103   *   This parameter must be a 12bit value.
01104   * @retval None
01105   */
01106 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
01107                                         uint16_t LowThreshold)
01108 {
01109   /* Check the parameters */
01110   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01111   assert_param(IS_ADC_THRESHOLD(HighThreshold));
01112   assert_param(IS_ADC_THRESHOLD(LowThreshold));
01113   /* Set the ADCx high threshold */
01114   ADCx->HTR = HighThreshold;
01115   /* Set the ADCx low threshold */
01116   ADCx->LTR = LowThreshold;
01117 }
01118 
01119 /**
01120   * @brief  Configures the analog watchdog guarded single channel
01121   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01122   * @param  ADC_Channel: the ADC channel to configure for the analog watchdog. 
01123   *   This parameter can be one of the following values:
01124   *     @arg ADC_Channel_0: ADC Channel0 selected
01125   *     @arg ADC_Channel_1: ADC Channel1 selected
01126   *     @arg ADC_Channel_2: ADC Channel2 selected
01127   *     @arg ADC_Channel_3: ADC Channel3 selected
01128   *     @arg ADC_Channel_4: ADC Channel4 selected
01129   *     @arg ADC_Channel_5: ADC Channel5 selected
01130   *     @arg ADC_Channel_6: ADC Channel6 selected
01131   *     @arg ADC_Channel_7: ADC Channel7 selected
01132   *     @arg ADC_Channel_8: ADC Channel8 selected
01133   *     @arg ADC_Channel_9: ADC Channel9 selected
01134   *     @arg ADC_Channel_10: ADC Channel10 selected
01135   *     @arg ADC_Channel_11: ADC Channel11 selected
01136   *     @arg ADC_Channel_12: ADC Channel12 selected
01137   *     @arg ADC_Channel_13: ADC Channel13 selected
01138   *     @arg ADC_Channel_14: ADC Channel14 selected
01139   *     @arg ADC_Channel_15: ADC Channel15 selected
01140   *     @arg ADC_Channel_16: ADC Channel16 selected
01141   *     @arg ADC_Channel_17: ADC Channel17 selected
01142   * @retval None
01143   */
01144 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel)
01145 {
01146   uint32_t tmpreg = 0;
01147   /* Check the parameters */
01148   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01149   assert_param(IS_ADC_CHANNEL(ADC_Channel));
01150   /* Get the old register value */
01151   tmpreg = ADCx->CR1;
01152   /* Clear the Analog watchdog channel select bits */
01153   tmpreg &= CR1_AWDCH_Reset;
01154   /* Set the Analog watchdog channel */
01155   tmpreg |= ADC_Channel;
01156   /* Store the new register value */
01157   ADCx->CR1 = tmpreg;
01158 }
01159 
01160 /**
01161   * @brief  Enables or disables the temperature sensor and Vrefint channel.
01162   * @param  NewState: new state of the temperature sensor.
01163   *   This parameter can be: ENABLE or DISABLE.
01164   * @retval None
01165   */
01166 void ADC_TempSensorVrefintCmd(FunctionalState NewState)
01167 {
01168   /* Check the parameters */
01169   assert_param(IS_FUNCTIONAL_STATE(NewState));
01170   if (NewState != DISABLE)
01171   {
01172     /* Enable the temperature sensor and Vrefint channel*/
01173     ADC1->CR2 |= CR2_TSVREFE_Set;
01174   }
01175   else
01176   {
01177     /* Disable the temperature sensor and Vrefint channel*/
01178     ADC1->CR2 &= CR2_TSVREFE_Reset;
01179   }
01180 }
01181 
01182 /**
01183   * @brief  Checks whether the specified ADC flag is set or not.
01184   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01185   * @param  ADC_FLAG: specifies the flag to check. 
01186   *   This parameter can be one of the following values:
01187   *     @arg ADC_FLAG_AWD: Analog watchdog flag
01188   *     @arg ADC_FLAG_EOC: End of conversion flag
01189   *     @arg ADC_FLAG_JEOC: End of injected group conversion flag
01190   *     @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
01191   *     @arg ADC_FLAG_STRT: Start of regular group conversion flag
01192   * @retval The new state of ADC_FLAG (SET or RESET).
01193   */
01194 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
01195 {
01196   FlagStatus bitstatus = RESET;
01197   /* Check the parameters */
01198   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01199   assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
01200   /* Check the status of the specified ADC flag */
01201   if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET)
01202   {
01203     /* ADC_FLAG is set */
01204     bitstatus = SET;
01205   }
01206   else
01207   {
01208     /* ADC_FLAG is reset */
01209     bitstatus = RESET;
01210   }
01211   /* Return the ADC_FLAG status */
01212   return  bitstatus;
01213 }
01214 
01215 /**
01216   * @brief  Clears the ADCx's pending flags.
01217   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01218   * @param  ADC_FLAG: specifies the flag to clear. 
01219   *   This parameter can be any combination of the following values:
01220   *     @arg ADC_FLAG_AWD: Analog watchdog flag
01221   *     @arg ADC_FLAG_EOC: End of conversion flag
01222   *     @arg ADC_FLAG_JEOC: End of injected group conversion flag
01223   *     @arg ADC_FLAG_JSTRT: Start of injected group conversion flag
01224   *     @arg ADC_FLAG_STRT: Start of regular group conversion flag
01225   * @retval None
01226   */
01227 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)
01228 {
01229   /* Check the parameters */
01230   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01231   assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
01232   /* Clear the selected ADC flags */
01233   ADCx->SR = ~(uint32_t)ADC_FLAG;
01234 }
01235 
01236 /**
01237   * @brief  Checks whether the specified ADC interrupt has occurred or not.
01238   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01239   * @param  ADC_IT: specifies the ADC interrupt source to check. 
01240   *   This parameter can be one of the following values:
01241   *     @arg ADC_IT_EOC: End of conversion interrupt mask
01242   *     @arg ADC_IT_AWD: Analog watchdog interrupt mask
01243   *     @arg ADC_IT_JEOC: End of injected conversion interrupt mask
01244   * @retval The new state of ADC_IT (SET or RESET).
01245   */
01246 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT)
01247 {
01248   ITStatus bitstatus = RESET;
01249   uint32_t itmask = 0, enablestatus = 0;
01250   /* Check the parameters */
01251   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01252   assert_param(IS_ADC_GET_IT(ADC_IT));
01253   /* Get the ADC IT index */
01254   itmask = ADC_IT >> 8;
01255   /* Get the ADC_IT enable bit status */
01256   enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ;
01257   /* Check the status of the specified ADC interrupt */
01258   if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus)
01259   {
01260     /* ADC_IT is set */
01261     bitstatus = SET;
01262   }
01263   else
01264   {
01265     /* ADC_IT is reset */
01266     bitstatus = RESET;
01267   }
01268   /* Return the ADC_IT status */
01269   return  bitstatus;
01270 }
01271 
01272 /**
01273   * @brief  Clears the ADCx’s interrupt pending bits.
01274   * @param  ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
01275   * @param  ADC_IT: specifies the ADC interrupt pending bit to clear.
01276   *   This parameter can be any combination of the following values:
01277   *     @arg ADC_IT_EOC: End of conversion interrupt mask
01278   *     @arg ADC_IT_AWD: Analog watchdog interrupt mask
01279   *     @arg ADC_IT_JEOC: End of injected conversion interrupt mask
01280   * @retval None
01281   */
01282 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT)
01283 {
01284   uint8_t itmask = 0;
01285   /* Check the parameters */
01286   assert_param(IS_ADC_ALL_PERIPH(ADCx));
01287   assert_param(IS_ADC_IT(ADC_IT));
01288   /* Get the ADC IT index */
01289   itmask = (uint8_t)(ADC_IT >> 8);
01290   /* Clear the selected ADC interrupt pending bits */
01291   ADCx->SR = ~(uint32_t)itmask;
01292 }
01293 
01294 /**
01295   * @}
01296   */
01297 
01298 /**
01299   * @}
01300   */
01301 
01302 /**
01303   * @}
01304   */
01305 
01306 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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