STM32F10x_System_Private_Defines
[Stm32f10x_system]

Defines

#define SYSCLK_FREQ_56MHz   56000000
#define SYSCLK_FREQ_56MHz   56000000
#define SYSCLK_FREQ_56MHz   56000000
#define SYSCLK_FREQ_56MHz   56000000
#define SYSCLK_FREQ_56MHz   56000000
#define SYSCLK_FREQ_56MHz   56000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define SYSCLK_FREQ_72MHz   72000000
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x2000
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0
#define VECT_TAB_OFFSET   0x0

Define Documentation

#define SYSCLK_FREQ_56MHz   56000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly.

Definition at line 82 of file STM32F10x_StdPeriph_Examples/ADC/TIMTrigger_AutoInjection/system_stm32f10x.c.

#define SYSCLK_FREQ_56MHz   56000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly.

Definition at line 82 of file STM32F10x_StdPeriph_Examples/ADC/RegSimul_DualMode/system_stm32f10x.c.

#define SYSCLK_FREQ_56MHz   56000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly.

Definition at line 82 of file STM32F10x_StdPeriph_Examples/ADC/ExtLinesTrigger/system_stm32f10x.c.

#define SYSCLK_FREQ_56MHz   56000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly.

Definition at line 82 of file STM32F10x_StdPeriph_Examples/ADC/AnalogWatchdog/system_stm32f10x.c.

#define SYSCLK_FREQ_56MHz   56000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly.

Definition at line 82 of file STM32F10x_StdPeriph_Examples/ADC/ADC1_DMA/system_stm32f10x.c.

#define SYSCLK_FREQ_56MHz   56000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly.

Definition at line 82 of file STM32F10x_StdPeriph_Examples/ADC/3ADCs_DMA/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Template/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/WWDG/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/Synchronous/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/Smartcard/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/Printf/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/Polling/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/MultiProcessor/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/IrDA/Transmit/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/IrDA/Receive/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/Interrupt/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/HyperTerminal_Interrupt/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/HyperTerminal_HwFlowControl/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/HalfDuplex/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/DMA_Polling/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/USART/DMA_Interrupt/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/TimeBase/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/TIM9_OCToggle/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/TIM1_Synchro/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/TIM15_ComplementarySignals/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/TIM10_PWMOutput/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/PWM_Output/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/PWM_Input/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/Parallel_Synchro/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/OnePulse/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/OCToggle/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/OCInactive/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/OCActive/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/InputCapture/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/ExtTrigger_Synchro/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/DMA/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/ComplementarySignals/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/Cascade_Synchro/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/7PWM_Output/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/TIM/6Steps/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SysTick/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SPI/SPI_FLASH/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SPI/Simplex_Interrupt/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SPI/DMA/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SPI/CRC/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/SDIO/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/RTC/LSI_Calib/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/RTC/Calendar/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/RCC/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/PWR/STOP/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/PWR/STANDBY/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/PWR/PVD/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/NVIC/Priority/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/NVIC/IRQ_Channels/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/Lib_DEBUG/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/IWDG/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/I2S/SPI_I2S_Switch/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/I2S/Interrupt/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/I2C/IOExpander/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/I2C/I2C_TSENSOR/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/I2C/EEPROM/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/GPIO/JTAG_Remap/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/GPIO/IOToggle/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/SRAM_DataMemory/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/SRAM/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/OneNAND/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/NOR_CodeExecute/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/NOR_CodeExecute/binary/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/NOR/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FSMC/NAND/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FLASH/Write_Protection/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FLASH/Program/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/EXTI/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DMA/SPI_RAM/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DMA/I2C_RAM/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DMA/FSMC/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DMA/FLASH_RAM/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DMA/ADC_TIM1/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DAC/TwoChannels_TriangleWave/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DAC/OneChannelDMA_Escalator/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DAC/OneChannel_NoiseWave/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/DAC/DualModeDMA_SineWave/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CRC/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CortexM3/Mode_Privilege/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CortexM3/BitBand/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CEC/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CAN/Networking/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CAN/LoopBack/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/CAN/DualCAN/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/BKP/Tamper/system_stm32f10x.c.

#define SYSCLK_FREQ_72MHz   72000000

< Uncomment the line corresponding to the desired System clock (SYSCLK) frequency (after reset the HSI is used as SYSCLK source)

IMPORTANT NOTE: ============== 1. After each device reset the HSI is used as System clock source.

2. Please make sure that the selected System clock doesn't exceed your device's maximum frequency.

3. If none of the define below is enabled, the HSI is used as System clock source.

4. The System clock configuration functions provided within this file assume that:

  • For Low, Medium and High density Value line devices an external 8MHz crystal is used to drive the System clock.
  • For Low, Medium and High density devices an external 8MHz crystal is used to drive the System clock.
  • For Connectivity line devices an external 25MHz crystal is used to drive the System clock. If you are using different crystal you have to adapt those functions accordingly. Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory Uncomment the following line if you need to relocate your vector Table in Internal SRAM.

Definition at line 83 of file STM32F10x_StdPeriph_Examples/BKP/Backup_Data/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Template/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/WWDG/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/Synchronous/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/Smartcard/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/Printf/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/Polling/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/MultiProcessor/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/IrDA/Transmit/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/IrDA/Receive/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/Interrupt/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/HyperTerminal_Interrupt/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/HyperTerminal_HwFlowControl/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/HalfDuplex/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/DMA_Polling/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/USART/DMA_Interrupt/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/TimeBase/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/TIM9_OCToggle/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/TIM1_Synchro/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/TIM15_ComplementarySignals/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/TIM10_PWMOutput/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/PWM_Output/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/PWM_Input/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/Parallel_Synchro/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/OnePulse/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/OCToggle/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/OCInactive/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/OCActive/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/InputCapture/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/ExtTrigger_Synchro/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/DMA/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/ComplementarySignals/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/Cascade_Synchro/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/7PWM_Output/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/TIM/6Steps/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SysTick/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SPI/SPI_FLASH/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SPI/Simplex_Interrupt/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SPI/DMA/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SPI/CRC/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/SDIO/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/RTC/LSI_Calib/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/RTC/Calendar/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/RCC/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/PWR/STOP/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/PWR/STANDBY/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/PWR/PVD/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x2000

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/NVIC/Priority/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/NVIC/IRQ_Channels/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/Lib_DEBUG/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/IWDG/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/I2S/SPI_I2S_Switch/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/I2S/Interrupt/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/I2C/IOExpander/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/I2C/I2C_TSENSOR/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/I2C/EEPROM/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/GPIO/JTAG_Remap/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/GPIO/IOToggle/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/SRAM_DataMemory/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/SRAM/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/OneNAND/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/NOR_CodeExecute/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/NOR_CodeExecute/binary/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/NOR/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FSMC/NAND/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FLASH/Write_Protection/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FLASH/Program/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/FLASH/Dual_Boot/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/EXTI/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DMA/SPI_RAM/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DMA/I2C_RAM/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DMA/FSMC/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DMA/FLASH_RAM/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DMA/ADC_TIM1/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DAC/TwoChannels_TriangleWave/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DAC/OneChannelDMA_Escalator/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DAC/OneChannel_NoiseWave/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/DAC/DualModeDMA_SineWave/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CRC/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CortexM3/Mode_Privilege/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CortexM3/BitBand/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CEC/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CAN/Networking/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CAN/LoopBack/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/CAN/DualCAN/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/BKP/Tamper/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/BKP/Backup_Data/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

< Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory

< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/ADC/TIMTrigger_AutoInjection/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

< Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory

< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/ADC/RegSimul_DualMode/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

< Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory

< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/ADC/ExtLinesTrigger/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

< Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory

< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/ADC/AnalogWatchdog/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

< Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory

< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/ADC/ADC1_DMA/system_stm32f10x.c.

#define VECT_TAB_OFFSET   0x0

< Uncomment the following line if you need to use external SRAM mounted on STM3210E-EVAL board (STM32 High density and XL-density devices) or on STM32100E-EVAL board (STM32 High-density value line devices) as data memory

< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. Vector Table base offset field. This value must be a multiple of 0x100.

Definition at line 96 of file STM32F10x_StdPeriph_Examples/ADC/3ADCs_DMA/system_stm32f10x.c.

Referenced by SystemInit().

STM32F10x Standard Peripherals Library: Footer

 

 

 

      For complete documentation on STM32(CORTEX M3) 32-bit Microcontrollers platform visit  www.st.com/STM32