Peripheral_memory_map
[Stm32f10x]

Defines

#define ADC1_BASE   (APB2PERIPH_BASE + 0x2400)
#define ADC2_BASE   (APB2PERIPH_BASE + 0x2800)
#define ADC3_BASE   (APB2PERIPH_BASE + 0x3C00)
#define AFIO_BASE   (APB2PERIPH_BASE + 0x0000)
#define AHBPERIPH_BASE   (PERIPH_BASE + 0x20000)
#define APB1PERIPH_BASE   PERIPH_BASE
#define APB2PERIPH_BASE   (PERIPH_BASE + 0x10000)
#define BKP_BASE   (APB1PERIPH_BASE + 0x6C00)
#define CAN1_BASE   (APB1PERIPH_BASE + 0x6400)
#define CAN2_BASE   (APB1PERIPH_BASE + 0x6800)
#define CEC_BASE   (APB1PERIPH_BASE + 0x7800)
#define CRC_BASE   (AHBPERIPH_BASE + 0x3000)
#define DAC_BASE   (APB1PERIPH_BASE + 0x7400)
#define DBGMCU_BASE   ((uint32_t)0xE0042000)
#define DMA1_BASE   (AHBPERIPH_BASE + 0x0000)
#define DMA1_Channel1_BASE   (AHBPERIPH_BASE + 0x0008)
#define DMA1_Channel2_BASE   (AHBPERIPH_BASE + 0x001C)
#define DMA1_Channel3_BASE   (AHBPERIPH_BASE + 0x0030)
#define DMA1_Channel4_BASE   (AHBPERIPH_BASE + 0x0044)
#define DMA1_Channel5_BASE   (AHBPERIPH_BASE + 0x0058)
#define DMA1_Channel6_BASE   (AHBPERIPH_BASE + 0x006C)
#define DMA1_Channel7_BASE   (AHBPERIPH_BASE + 0x0080)
#define DMA2_BASE   (AHBPERIPH_BASE + 0x0400)
#define DMA2_Channel1_BASE   (AHBPERIPH_BASE + 0x0408)
#define DMA2_Channel2_BASE   (AHBPERIPH_BASE + 0x041C)
#define DMA2_Channel3_BASE   (AHBPERIPH_BASE + 0x0430)
#define DMA2_Channel4_BASE   (AHBPERIPH_BASE + 0x0444)
#define DMA2_Channel5_BASE   (AHBPERIPH_BASE + 0x0458)
#define ETH_BASE   (AHBPERIPH_BASE + 0x8000)
#define ETH_DMA_BASE   (ETH_BASE + 0x1000)
#define ETH_MAC_BASE   (ETH_BASE)
#define ETH_MMC_BASE   (ETH_BASE + 0x0100)
#define ETH_PTP_BASE   (ETH_BASE + 0x0700)
#define EXTI_BASE   (APB2PERIPH_BASE + 0x0400)
#define FLASH_BASE   ((uint32_t)0x08000000)
#define FLASH_R_BASE   (AHBPERIPH_BASE + 0x2000)
#define FSMC_Bank1_R_BASE   (FSMC_R_BASE + 0x0000)
#define FSMC_Bank1E_R_BASE   (FSMC_R_BASE + 0x0104)
#define FSMC_Bank2_R_BASE   (FSMC_R_BASE + 0x0060)
#define FSMC_Bank3_R_BASE   (FSMC_R_BASE + 0x0080)
#define FSMC_Bank4_R_BASE   (FSMC_R_BASE + 0x00A0)
#define FSMC_R_BASE   ((uint32_t)0xA0000000)
#define GPIOA_BASE   (APB2PERIPH_BASE + 0x0800)
#define GPIOB_BASE   (APB2PERIPH_BASE + 0x0C00)
#define GPIOC_BASE   (APB2PERIPH_BASE + 0x1000)
#define GPIOD_BASE   (APB2PERIPH_BASE + 0x1400)
#define GPIOE_BASE   (APB2PERIPH_BASE + 0x1800)
#define GPIOF_BASE   (APB2PERIPH_BASE + 0x1C00)
#define GPIOG_BASE   (APB2PERIPH_BASE + 0x2000)
#define I2C1_BASE   (APB1PERIPH_BASE + 0x5400)
#define I2C2_BASE   (APB1PERIPH_BASE + 0x5800)
#define IWDG_BASE   (APB1PERIPH_BASE + 0x3000)
#define OB_BASE   ((uint32_t)0x1FFFF800)
#define PERIPH_BASE   ((uint32_t)0x40000000)
#define PERIPH_BB_BASE   ((uint32_t)0x42000000)
#define PWR_BASE   (APB1PERIPH_BASE + 0x7000)
#define RCC_BASE   (AHBPERIPH_BASE + 0x1000)
#define RTC_BASE   (APB1PERIPH_BASE + 0x2800)
#define SDIO_BASE   (PERIPH_BASE + 0x18000)
#define SPI1_BASE   (APB2PERIPH_BASE + 0x3000)
#define SPI2_BASE   (APB1PERIPH_BASE + 0x3800)
#define SPI3_BASE   (APB1PERIPH_BASE + 0x3C00)
#define SRAM_BASE   ((uint32_t)0x20000000)
#define SRAM_BB_BASE   ((uint32_t)0x22000000)
#define TIM10_BASE   (APB2PERIPH_BASE + 0x5000)
#define TIM11_BASE   (APB2PERIPH_BASE + 0x5400)
#define TIM12_BASE   (APB1PERIPH_BASE + 0x1800)
#define TIM13_BASE   (APB1PERIPH_BASE + 0x1C00)
#define TIM14_BASE   (APB1PERIPH_BASE + 0x2000)
#define TIM15_BASE   (APB2PERIPH_BASE + 0x4000)
#define TIM16_BASE   (APB2PERIPH_BASE + 0x4400)
#define TIM17_BASE   (APB2PERIPH_BASE + 0x4800)
#define TIM1_BASE   (APB2PERIPH_BASE + 0x2C00)
#define TIM2_BASE   (APB1PERIPH_BASE + 0x0000)
#define TIM3_BASE   (APB1PERIPH_BASE + 0x0400)
#define TIM4_BASE   (APB1PERIPH_BASE + 0x0800)
#define TIM5_BASE   (APB1PERIPH_BASE + 0x0C00)
#define TIM6_BASE   (APB1PERIPH_BASE + 0x1000)
#define TIM7_BASE   (APB1PERIPH_BASE + 0x1400)
#define TIM8_BASE   (APB2PERIPH_BASE + 0x3400)
#define TIM9_BASE   (APB2PERIPH_BASE + 0x4C00)
#define UART4_BASE   (APB1PERIPH_BASE + 0x4C00)
#define UART5_BASE   (APB1PERIPH_BASE + 0x5000)
#define USART1_BASE   (APB2PERIPH_BASE + 0x3800)
#define USART2_BASE   (APB1PERIPH_BASE + 0x4400)
#define USART3_BASE   (APB1PERIPH_BASE + 0x4800)
#define WWDG_BASE   (APB1PERIPH_BASE + 0x2C00)

Define Documentation

#define ADC1_BASE   (APB2PERIPH_BASE + 0x2400)

Definition at line 1305 of file stm32f10x.h.

Referenced by debug().

#define ADC2_BASE   (APB2PERIPH_BASE + 0x2800)

Definition at line 1306 of file stm32f10x.h.

Referenced by debug().

#define ADC3_BASE   (APB2PERIPH_BASE + 0x3C00)

Definition at line 1311 of file stm32f10x.h.

Referenced by debug().

#define AFIO_BASE   (APB2PERIPH_BASE + 0x0000)

Definition at line 1296 of file stm32f10x.h.

Referenced by debug().

#define AHBPERIPH_BASE   (PERIPH_BASE + 0x20000)

Definition at line 1267 of file stm32f10x.h.

#define APB1PERIPH_BASE   PERIPH_BASE

Definition at line 1265 of file stm32f10x.h.

#define APB2PERIPH_BASE   (PERIPH_BASE + 0x10000)

Definition at line 1266 of file stm32f10x.h.

#define BKP_BASE   (APB1PERIPH_BASE + 0x6C00)

Definition at line 1291 of file stm32f10x.h.

Referenced by BKP_ReadBackupRegister(), BKP_WriteBackupRegister(), and debug().

#define CAN1_BASE   (APB1PERIPH_BASE + 0x6400)

Definition at line 1289 of file stm32f10x.h.

Referenced by debug().

#define CAN2_BASE   (APB1PERIPH_BASE + 0x6800)

Definition at line 1290 of file stm32f10x.h.

#define CEC_BASE   (APB1PERIPH_BASE + 0x7800)

Definition at line 1294 of file stm32f10x.h.

Referenced by CEC_GetFlagStatus(), and debug().

#define CRC_BASE   (AHBPERIPH_BASE + 0x3000)

Definition at line 1336 of file stm32f10x.h.

Referenced by debug().

#define DAC_BASE   (APB1PERIPH_BASE + 0x7400)
#define DBGMCU_BASE   ((uint32_t)0xE0042000)

Debug MCU registers base address

Definition at line 1353 of file stm32f10x.h.

Referenced by debug().

#define DMA1_BASE   (AHBPERIPH_BASE + 0x0000)

Definition at line 1321 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel1_BASE   (AHBPERIPH_BASE + 0x0008)

Definition at line 1322 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel2_BASE   (AHBPERIPH_BASE + 0x001C)

Definition at line 1323 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel3_BASE   (AHBPERIPH_BASE + 0x0030)

Definition at line 1324 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel4_BASE   (AHBPERIPH_BASE + 0x0044)

Definition at line 1325 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel5_BASE   (AHBPERIPH_BASE + 0x0058)

Definition at line 1326 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel6_BASE   (AHBPERIPH_BASE + 0x006C)

Definition at line 1327 of file stm32f10x.h.

Referenced by debug().

#define DMA1_Channel7_BASE   (AHBPERIPH_BASE + 0x0080)

Definition at line 1328 of file stm32f10x.h.

Referenced by debug().

#define DMA2_BASE   (AHBPERIPH_BASE + 0x0400)

Definition at line 1329 of file stm32f10x.h.

Referenced by debug().

#define DMA2_Channel1_BASE   (AHBPERIPH_BASE + 0x0408)

Definition at line 1330 of file stm32f10x.h.

Referenced by debug().

#define DMA2_Channel2_BASE   (AHBPERIPH_BASE + 0x041C)

Definition at line 1331 of file stm32f10x.h.

Referenced by debug().

#define DMA2_Channel3_BASE   (AHBPERIPH_BASE + 0x0430)

Definition at line 1332 of file stm32f10x.h.

Referenced by debug().

#define DMA2_Channel4_BASE   (AHBPERIPH_BASE + 0x0444)

Definition at line 1333 of file stm32f10x.h.

Referenced by debug().

#define DMA2_Channel5_BASE   (AHBPERIPH_BASE + 0x0458)

Definition at line 1334 of file stm32f10x.h.

Referenced by debug().

#define ETH_BASE   (AHBPERIPH_BASE + 0x8000)

Definition at line 1341 of file stm32f10x.h.

#define ETH_DMA_BASE   (ETH_BASE + 0x1000)

Definition at line 1345 of file stm32f10x.h.

#define ETH_MAC_BASE   (ETH_BASE)

Definition at line 1342 of file stm32f10x.h.

#define ETH_MMC_BASE   (ETH_BASE + 0x0100)

Definition at line 1343 of file stm32f10x.h.

#define ETH_PTP_BASE   (ETH_BASE + 0x0700)

Definition at line 1344 of file stm32f10x.h.

#define EXTI_BASE   (APB2PERIPH_BASE + 0x0400)

Definition at line 1297 of file stm32f10x.h.

Referenced by debug(), and EXTI_Init().

#define FLASH_BASE   ((uint32_t)0x08000000)

FLASH base address in the alias region

Definition at line 1255 of file stm32f10x.h.

Referenced by SystemInit().

#define FLASH_R_BASE   (AHBPERIPH_BASE + 0x2000)

Flash registers base address

Definition at line 1338 of file stm32f10x.h.

Referenced by debug().

#define FSMC_Bank1_R_BASE   (FSMC_R_BASE + 0x0000)

FSMC Bank1 registers base address

Definition at line 1347 of file stm32f10x.h.

Referenced by debug().

#define FSMC_Bank1E_R_BASE   (FSMC_R_BASE + 0x0104)

FSMC Bank1E registers base address

Definition at line 1348 of file stm32f10x.h.

Referenced by debug().

#define FSMC_Bank2_R_BASE   (FSMC_R_BASE + 0x0060)

FSMC Bank2 registers base address

Definition at line 1349 of file stm32f10x.h.

Referenced by debug().

#define FSMC_Bank3_R_BASE   (FSMC_R_BASE + 0x0080)

FSMC Bank3 registers base address

Definition at line 1350 of file stm32f10x.h.

Referenced by debug().

#define FSMC_Bank4_R_BASE   (FSMC_R_BASE + 0x00A0)

FSMC Bank4 registers base address

Definition at line 1351 of file stm32f10x.h.

Referenced by debug().

#define FSMC_R_BASE   ((uint32_t)0xA0000000)

FSMC registers base address Peripheral memory map

Definition at line 1262 of file stm32f10x.h.

#define GPIOA_BASE   (APB2PERIPH_BASE + 0x0800)

Definition at line 1298 of file stm32f10x.h.

Referenced by debug().

#define GPIOB_BASE   (APB2PERIPH_BASE + 0x0C00)

Definition at line 1299 of file stm32f10x.h.

Referenced by debug().

#define GPIOC_BASE   (APB2PERIPH_BASE + 0x1000)

Definition at line 1300 of file stm32f10x.h.

Referenced by debug().

#define GPIOD_BASE   (APB2PERIPH_BASE + 0x1400)

Definition at line 1301 of file stm32f10x.h.

Referenced by debug().

#define GPIOE_BASE   (APB2PERIPH_BASE + 0x1800)

Definition at line 1302 of file stm32f10x.h.

Referenced by debug().

#define GPIOF_BASE   (APB2PERIPH_BASE + 0x1C00)

Definition at line 1303 of file stm32f10x.h.

Referenced by debug().

#define GPIOG_BASE   (APB2PERIPH_BASE + 0x2000)

Definition at line 1304 of file stm32f10x.h.

Referenced by debug().

#define I2C1_BASE   (APB1PERIPH_BASE + 0x5400)

Definition at line 1287 of file stm32f10x.h.

Referenced by debug().

#define I2C2_BASE   (APB1PERIPH_BASE + 0x5800)

Definition at line 1288 of file stm32f10x.h.

Referenced by debug().

#define IWDG_BASE   (APB1PERIPH_BASE + 0x3000)

Definition at line 1280 of file stm32f10x.h.

Referenced by debug().

#define OB_BASE   ((uint32_t)0x1FFFF800)

Flash Option Bytes base address

Definition at line 1339 of file stm32f10x.h.

Referenced by debug().

#define PERIPH_BASE   ((uint32_t)0x40000000)

Peripheral base address in the alias region

Definition at line 1257 of file stm32f10x.h.

#define PERIPH_BB_BASE   ((uint32_t)0x42000000)

Peripheral base address in the bit-band region

Definition at line 1260 of file stm32f10x.h.

#define PWR_BASE   (APB1PERIPH_BASE + 0x7000)

Definition at line 1292 of file stm32f10x.h.

Referenced by debug().

#define RCC_BASE   (AHBPERIPH_BASE + 0x1000)

Definition at line 1335 of file stm32f10x.h.

Referenced by debug().

#define RTC_BASE   (APB1PERIPH_BASE + 0x2800)

Definition at line 1278 of file stm32f10x.h.

Referenced by debug().

#define SDIO_BASE   (PERIPH_BASE + 0x18000)

Definition at line 1319 of file stm32f10x.h.

Referenced by debug().

#define SPI1_BASE   (APB2PERIPH_BASE + 0x3000)

Definition at line 1308 of file stm32f10x.h.

Referenced by debug().

#define SPI2_BASE   (APB1PERIPH_BASE + 0x3800)

Definition at line 1281 of file stm32f10x.h.

Referenced by debug(), and I2S_Init().

#define SPI3_BASE   (APB1PERIPH_BASE + 0x3C00)

Definition at line 1282 of file stm32f10x.h.

Referenced by debug().

#define SRAM_BASE   ((uint32_t)0x20000000)

SRAM base address in the alias region

Definition at line 1256 of file stm32f10x.h.

Referenced by SystemInit().

#define SRAM_BB_BASE   ((uint32_t)0x22000000)

SRAM base address in the bit-band region

Definition at line 1259 of file stm32f10x.h.

#define TIM10_BASE   (APB2PERIPH_BASE + 0x5000)

Definition at line 1316 of file stm32f10x.h.

#define TIM11_BASE   (APB2PERIPH_BASE + 0x5400)

Definition at line 1317 of file stm32f10x.h.

#define TIM12_BASE   (APB1PERIPH_BASE + 0x1800)

Definition at line 1275 of file stm32f10x.h.

#define TIM13_BASE   (APB1PERIPH_BASE + 0x1C00)

Definition at line 1276 of file stm32f10x.h.

#define TIM14_BASE   (APB1PERIPH_BASE + 0x2000)

Definition at line 1277 of file stm32f10x.h.

#define TIM15_BASE   (APB2PERIPH_BASE + 0x4000)

Definition at line 1312 of file stm32f10x.h.

Referenced by debug().

#define TIM16_BASE   (APB2PERIPH_BASE + 0x4400)

Definition at line 1313 of file stm32f10x.h.

Referenced by debug().

#define TIM17_BASE   (APB2PERIPH_BASE + 0x4800)

Definition at line 1314 of file stm32f10x.h.

Referenced by debug().

#define TIM1_BASE   (APB2PERIPH_BASE + 0x2C00)

Definition at line 1307 of file stm32f10x.h.

Referenced by debug().

#define TIM2_BASE   (APB1PERIPH_BASE + 0x0000)

Definition at line 1269 of file stm32f10x.h.

Referenced by debug().

#define TIM3_BASE   (APB1PERIPH_BASE + 0x0400)

Definition at line 1270 of file stm32f10x.h.

Referenced by debug().

#define TIM4_BASE   (APB1PERIPH_BASE + 0x0800)

Definition at line 1271 of file stm32f10x.h.

Referenced by debug().

#define TIM5_BASE   (APB1PERIPH_BASE + 0x0C00)

Definition at line 1272 of file stm32f10x.h.

Referenced by debug().

#define TIM6_BASE   (APB1PERIPH_BASE + 0x1000)

Definition at line 1273 of file stm32f10x.h.

Referenced by debug().

#define TIM7_BASE   (APB1PERIPH_BASE + 0x1400)

Definition at line 1274 of file stm32f10x.h.

Referenced by debug().

#define TIM8_BASE   (APB2PERIPH_BASE + 0x3400)

Definition at line 1309 of file stm32f10x.h.

Referenced by debug().

#define TIM9_BASE   (APB2PERIPH_BASE + 0x4C00)

Definition at line 1315 of file stm32f10x.h.

#define UART4_BASE   (APB1PERIPH_BASE + 0x4C00)

Definition at line 1285 of file stm32f10x.h.

Referenced by debug().

#define UART5_BASE   (APB1PERIPH_BASE + 0x5000)

Definition at line 1286 of file stm32f10x.h.

Referenced by debug().

#define USART1_BASE   (APB2PERIPH_BASE + 0x3800)

Definition at line 1310 of file stm32f10x.h.

Referenced by debug(), and USART_Init().

#define USART2_BASE   (APB1PERIPH_BASE + 0x4400)

Definition at line 1283 of file stm32f10x.h.

Referenced by debug().

#define USART3_BASE   (APB1PERIPH_BASE + 0x4800)

Definition at line 1284 of file stm32f10x.h.

Referenced by debug().

#define WWDG_BASE   (APB1PERIPH_BASE + 0x2C00)

Definition at line 1279 of file stm32f10x.h.

Referenced by debug().

STM32F10x Standard Peripherals Library: Footer

 

 

 

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