PWR_Private_Defines
[PWR]

Defines

#define CR_DBP_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
#define CR_DS_MASK   ((uint32_t)0xFFFFFFFC)
#define CR_OFFSET   (PWR_OFFSET + 0x00)
#define CR_PLS_MASK   ((uint32_t)0xFFFFFF1F)
#define CR_PVDE_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
#define CSR_EWUP_BB   (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))
#define CSR_OFFSET   (PWR_OFFSET + 0x04)
#define DBP_BitNumber   0x08
#define EWUP_BitNumber   0x08
#define PVDE_BitNumber   0x04
#define PWR_OFFSET   (PWR_BASE - PERIPH_BASE)

Define Documentation

#define CR_DBP_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))

Definition at line 54 of file stm32f10x_pwr.c.

Referenced by PWR_BackupAccessCmd().

#define CR_DS_MASK   ((uint32_t)0xFFFFFFFC)

Definition at line 70 of file stm32f10x_pwr.c.

Referenced by PWR_EnterSTOPMode().

#define CR_OFFSET   (PWR_OFFSET + 0x00)

Definition at line 52 of file stm32f10x_pwr.c.

#define CR_PLS_MASK   ((uint32_t)0xFFFFFF1F)

Definition at line 71 of file stm32f10x_pwr.c.

Referenced by PWR_PVDLevelConfig().

#define CR_PVDE_BB   (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))

Definition at line 58 of file stm32f10x_pwr.c.

Referenced by PWR_PVDCmd().

#define CSR_EWUP_BB   (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4))

Definition at line 65 of file stm32f10x_pwr.c.

Referenced by PWR_WakeUpPinCmd().

#define CSR_OFFSET   (PWR_OFFSET + 0x04)

Definition at line 63 of file stm32f10x_pwr.c.

#define DBP_BitNumber   0x08

Definition at line 53 of file stm32f10x_pwr.c.

#define EWUP_BitNumber   0x08

Definition at line 64 of file stm32f10x_pwr.c.

#define PVDE_BitNumber   0x04

Definition at line 57 of file stm32f10x_pwr.c.

#define PWR_OFFSET   (PWR_BASE - PERIPH_BASE)

Definition at line 47 of file stm32f10x_pwr.c.

STM32F10x Standard Peripherals Library: Footer

 

 

 

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