STM32F10x_StdPeriph_Examples/TIM/Cascade_Synchro/main.c

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00001 /**
00002   ******************************************************************************
00003   * @file    TIM/Cascade_Synchro/main.c 
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   Main program body
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x.h"
00023 
00024 /** @addtogroup STM32F10x_StdPeriph_Examples
00025   * @{
00026   */
00027 
00028 /** @addtogroup TIM_Cascade_Synchro
00029   * @{
00030   */ 
00031 
00032 /* Private typedef -----------------------------------------------------------*/
00033 /* Private define ------------------------------------------------------------*/
00034 /* Private macro -------------------------------------------------------------*/
00035 /* Private variables ---------------------------------------------------------*/
00036 TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;
00037 TIM_OCInitTypeDef  TIM_OCInitStructure;
00038 
00039 /* Private function prototypes -----------------------------------------------*/
00040 void RCC_Configuration(void);
00041 void GPIO_Configuration(void);
00042 
00043 /* Private functions ---------------------------------------------------------*/
00044 
00045 /**
00046   * @brief   Main program
00047   * @param  None
00048   * @retval None
00049   */
00050 int main(void)
00051 {
00052   /*!< At this stage the microcontroller clock setting is already configured, 
00053        this is done through SystemInit() function which is called from startup
00054        file (startup_stm32f10x_xx.s) before to branch to application main.
00055        To reconfigure the default setting of SystemInit() function, refer to
00056        system_stm32f10x.c file
00057      */     
00058        
00059   /* System Clocks Configuration */
00060   RCC_Configuration();
00061 
00062   /* GPIO Configuration */
00063   GPIO_Configuration();
00064 
00065   /* Timers synchronisation in cascade mode ----------------------------
00066      1/TIM2 is configured as Master Timer:
00067      - PWM Mode is used
00068      - The TIM2 Update event is used as Trigger Output  
00069 
00070      2/TIM3 is slave for TIM2 and Master for TIM4,
00071      - PWM Mode is used
00072      - The ITR1(TIM2) is used as input trigger 
00073      - Gated mode is used, so start and stop of slave counter
00074       are controlled by the Master trigger output signal(TIM2 update event).
00075       - The TIM3 Update event is used as Trigger Output. 
00076 
00077       3/TIM4 is slave for TIM3,
00078      - PWM Mode is used
00079      - The ITR2(TIM3) is used as input trigger
00080      - Gated mode is used, so start and stop of slave counter
00081       are controlled by the Master trigger output signal(TIM3 update event).
00082 
00083      * For Low-density, Medium-density, High-density and Connectivity line devices:
00084        The TIMxCLK is fixed to 72 MHz, the TIM2 counter clock is 72 MHz.
00085 
00086        The Master Timer TIM2 is running at TIM2 frequency :
00087        TIM2 frequency = (TIM2 counter clock)/ (TIM2 period + 1) = 281.250 KHz 
00088        and the duty cycle = TIM2_CCR1/(TIM2_ARR + 1) = 25%.
00089 
00090        The TIM3 is running:
00091        - At (TIM2 frequency)/ (TIM3 period + 1) = 70.312 KHz and a duty cycle
00092          equal to TIM3_CCR1/(TIM3_ARR + 1) = 25%
00093 
00094         The TIM4 is running:
00095       - At (TIM3 frequency)/ (TIM4 period + 1) = 17.578 KHz and a duty cycle
00096         equal to TIM4_CCR1/(TIM4_ARR + 1) = 25%
00097 
00098      * For Low-Density Value line,Medium-Density and High-Density Value line devices:
00099        The TIMxCLK is fixed to 24 MHz, the TIM2 counter clock is 24 MHz.
00100        So TIM2 frequency = 93.750 KHz,
00101        TIM3 is running at 23.437 KHz,
00102        and TIM4 is running at 5.85 KHz
00103   -------------------------------------------------------------------- */
00104 
00105   /* Time base configuration */
00106   TIM_TimeBaseStructure.TIM_Period = 255;
00107   TIM_TimeBaseStructure.TIM_Prescaler = 0;
00108   TIM_TimeBaseStructure.TIM_ClockDivision = 0;
00109   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
00110 
00111   TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
00112 
00113   TIM_TimeBaseStructure.TIM_Period = 3;
00114   TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
00115 
00116   TIM_TimeBaseStructure.TIM_Period = 3;
00117   TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
00118 
00119   /* Master Configuration in PWM1 Mode */
00120   TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
00121   TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
00122   TIM_OCInitStructure.TIM_Pulse = 64;
00123   TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
00124 
00125   TIM_OC1Init(TIM2, &TIM_OCInitStructure);
00126 
00127   /* Select the Master Slave Mode */
00128   TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable);
00129 
00130   /* Master Mode selection */
00131   TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update);
00132 
00133   /* Slaves Configuration: PWM1 Mode */
00134   TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
00135   TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
00136   TIM_OCInitStructure.TIM_Pulse = 1;
00137 
00138   TIM_OC1Init(TIM3, &TIM_OCInitStructure);
00139 
00140   TIM_OC1Init(TIM4, &TIM_OCInitStructure);
00141 
00142   /* Slave Mode selection: TIM3 */
00143   TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated);
00144   TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1);
00145 
00146   /* Select the Master Slave Mode */
00147   TIM_SelectMasterSlaveMode(TIM3, TIM_MasterSlaveMode_Enable);
00148 
00149   /* Master Mode selection: TIM3 */
00150   TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Update);
00151 
00152   /* Slave Mode selection: TIM4 */
00153   TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated);
00154   TIM_SelectInputTrigger(TIM4, TIM_TS_ITR2);
00155   
00156   /* TIM enable counter */
00157   TIM_Cmd(TIM3, ENABLE);
00158   TIM_Cmd(TIM2, ENABLE);
00159   TIM_Cmd(TIM4, ENABLE);
00160 
00161   while (1)
00162   {
00163   }
00164 }
00165 
00166 /**
00167   * @brief  Configures the different system clocks.
00168   * @param  None
00169   * @retval None
00170   */
00171 void RCC_Configuration(void)
00172 {  
00173   /* TIM2, TIM3 and TIM4 clock enable */
00174   RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2 | RCC_APB1Periph_TIM3 |
00175                          RCC_APB1Periph_TIM4, ENABLE);
00176 
00177   /* GPIOA, GPIOB, GPIOC and AFIO clocks enable */
00178   RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |
00179                          RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
00180 }
00181 
00182 /**
00183   * @brief  Configure the GPIOD Pins.
00184   * @param  None
00185   * @retval None
00186   */
00187 void GPIO_Configuration(void)
00188 {
00189   GPIO_InitTypeDef GPIO_InitStructure;
00190 
00191 #ifdef STM32F10X_CL
00192   /*GPIOB Configuration:  PC6(TIM3 CH1) as alternate function push-pull */
00193   GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_6 ;
00194   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00195   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00196 
00197   GPIO_Init(GPIOC, &GPIO_InitStructure);
00198 
00199   GPIO_PinRemapConfig(GPIO_FullRemap_TIM3, ENABLE);     
00200 
00201 #else
00202 /* GPIOA Configuration: PA6(TIM3 CH1) as alternate function push-pull */
00203   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
00204   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00205   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00206 
00207   GPIO_Init(GPIOA, &GPIO_InitStructure);
00208 #endif
00209   /* GPIOA Configuration: PA0(TIM2 CH1) as alternate function push-pull */
00210   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
00211   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00212   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00213 
00214   GPIO_Init(GPIOA, &GPIO_InitStructure);
00215 
00216   /* GPIOB Configuration: PB6(TIM4 CH1) as alternate function push-pull */
00217   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
00218 
00219   GPIO_Init(GPIOB, &GPIO_InitStructure);
00220 }
00221 
00222 #ifdef  USE_FULL_ASSERT
00223 
00224 /**
00225   * @brief  Reports the name of the source file and the source line number
00226   *         where the assert_param error has occurred.
00227   * @param  file: pointer to the source file name
00228   * @param  line: assert_param error line source number
00229   * @retval None
00230   */
00231 void assert_failed(uint8_t* file, uint32_t line)
00232 {
00233   /* User can add his own implementation to report the file name and line number,
00234      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00235 
00236   while (1)
00237   {}
00238 }
00239 #endif
00240 
00241 /**
00242   * @}
00243   */ 
00244 
00245 /**
00246   * @}
00247   */ 
00248 
00249 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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