STM32F10x_StdPeriph_Examples/SPI/Simplex_Interrupt/main.c

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00001 /**
00002   ******************************************************************************
00003   * @file    SPI/Simplex_Interrupt/main.c 
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   Main program body
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x.h"
00023 #include "platform_config.h"
00024 
00025 /** @addtogroup STM32F10x_StdPeriph_Examples
00026   * @{
00027   */
00028 
00029 /** @addtogroup SPI_Simplex_Interrupt
00030   * @{
00031   */ 
00032 
00033 /* Private typedef -----------------------------------------------------------*/
00034 typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus;
00035 
00036 /* Private define ------------------------------------------------------------*/
00037 #define BufferSize 32
00038 
00039 /* Private macro -------------------------------------------------------------*/
00040 /* Private variables ---------------------------------------------------------*/
00041 SPI_InitTypeDef SPI_InitStructure;
00042 uint8_t SPI_MASTER_Buffer_Tx[BufferSize] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06,
00043                                             0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C,
00044                                             0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12,
00045                                             0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
00046                                             0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E,
00047                                             0x1F, 0x20};
00048 uint8_t SPI_SLAVE_Buffer_Rx[BufferSize];
00049 __IO uint8_t TxIdx = 0, RxIdx = 0;
00050 volatile TestStatus TransferStatus = FAILED;
00051 
00052 /* Private functions ---------------------------------------------------------*/
00053 void RCC_Configuration(void);
00054 void GPIO_Configuration(void);
00055 void NVIC_Configuration(void);
00056 TestStatus Buffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength);
00057 
00058 /**
00059   * @brief  Main program
00060   * @param  None
00061   * @retval None
00062   */
00063 int main(void)
00064 {
00065   /*!< At this stage the microcontroller clock setting is already configured, 
00066        this is done through SystemInit() function which is called from startup
00067        file (startup_stm32f10x_xx.s) before to branch to application main.
00068        To reconfigure the default setting of SystemInit() function, refer to
00069        system_stm32f10x.c file
00070      */     
00071        
00072   /* System clocks configuration ---------------------------------------------*/
00073   RCC_Configuration();
00074 
00075   /* NVIC configuration ------------------------------------------------------*/
00076   NVIC_Configuration();
00077 
00078   /* GPIO configuration ------------------------------------------------------*/
00079   GPIO_Configuration();
00080 
00081   /* SPI_MASTER configuration ------------------------------------------------*/
00082   SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Tx;
00083   SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
00084   SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
00085   SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
00086   SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
00087   SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
00088   SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
00089   SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
00090   SPI_InitStructure.SPI_CRCPolynomial = 7;
00091   SPI_Init(SPI_MASTER, &SPI_InitStructure);
00092 
00093   /* SPI_SLAVE configuration -------------------------------------------------*/
00094   SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Rx;
00095   SPI_InitStructure.SPI_Mode = SPI_Mode_Slave;
00096   SPI_Init(SPI_SLAVE, &SPI_InitStructure);
00097 
00098   /* Enable SPI_MASTER TXE interrupt */
00099   SPI_I2S_ITConfig(SPI_MASTER, SPI_I2S_IT_TXE, ENABLE);
00100   /* Enable SPI_SLAVE RXNE interrupt */
00101   SPI_I2S_ITConfig(SPI_SLAVE, SPI_I2S_IT_RXNE, ENABLE);
00102 
00103   /* Enable SPI_SLAVE */
00104   SPI_Cmd(SPI_SLAVE, ENABLE);
00105   /* Enable SPI_MASTER */
00106   SPI_Cmd(SPI_MASTER, ENABLE);
00107 
00108   /* Transfer procedure */
00109   while (RxIdx < BufferSize)
00110   {}
00111 
00112   /* Check the corectness of written dada */
00113   TransferStatus = Buffercmp(SPI_SLAVE_Buffer_Rx, SPI_MASTER_Buffer_Tx, BufferSize);
00114   /* TransferStatus = PASSED, if the transmitted and received data
00115      are equal */
00116   /* TransferStatus = FAILED, if the transmitted and received data
00117      are different */
00118 
00119   while (1)
00120   {}
00121 }
00122 
00123 /**
00124   * @brief  Configures the different system clocks.
00125   * @param  None
00126   * @retval None
00127   */
00128 void RCC_Configuration(void)
00129 {
00130   /* PCLK2 = HCLK/2 */
00131   RCC_PCLK2Config(RCC_HCLK_Div2); 
00132 
00133 /* Enable peripheral clocks --------------------------------------------------*/
00134 #ifdef USE_STM3210C_EVAL
00135   /* Enable GPIO clock for SPI_MASTER and SPI_SLAVE */
00136   RCC_APB2PeriphClockCmd(SPI_MASTER_GPIO_CLK | SPI_SLAVE_GPIO_CLK |
00137                          RCC_APB2Periph_AFIO, ENABLE);
00138 
00139   /* Enable SPI_MASTER Periph clock */
00140   RCC_APB1PeriphClockCmd(SPI_MASTER_CLK, ENABLE);                           
00141 #else
00142   /* Enable SPI_MASTER clock and GPIO clock for SPI_MASTER and SPI_SLAVE */
00143   RCC_APB2PeriphClockCmd(SPI_MASTER_GPIO_CLK | SPI_SLAVE_GPIO_CLK |
00144                          SPI_MASTER_CLK, ENABLE);
00145 #endif
00146   /* Enable SPI_SLAVE Periph clock */
00147   RCC_APB1PeriphClockCmd(SPI_SLAVE_CLK, ENABLE);
00148 }
00149 
00150 /**
00151   * @brief  Configures the different GPIO ports.
00152   * @param  None
00153   * @retval None
00154   */
00155 void GPIO_Configuration(void)
00156 {
00157   GPIO_InitTypeDef GPIO_InitStructure;
00158 
00159 #ifdef USE_STM3210C_EVAL
00160   /* Enable SPI3 Pins Software Remapping */
00161   GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE);
00162 #endif
00163 
00164   /* Configure SPI_MASTER pins: SCK and MOSI ---------------------------------*/
00165   /* Confugure SCK and MOSI pins as Alternate Function Push Pull */
00166   GPIO_InitStructure.GPIO_Pin = SPI_MASTER_PIN_SCK | SPI_MASTER_PIN_MOSI;
00167   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00168   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00169   GPIO_Init(SPI_MASTER_GPIO, &GPIO_InitStructure);
00170   
00171   /* Configure SPI_SLAVE pins: SCK and MISO ---------------------------------*/
00172   /* Confugure SCK and MOSI pins as Input Floating */
00173   GPIO_InitStructure.GPIO_Pin = SPI_SLAVE_PIN_SCK ;
00174   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
00175   GPIO_Init(SPI_SLAVE_GPIO, &GPIO_InitStructure);
00176   /* Confugure MISO pin as Alternate Function Push Pull */
00177   GPIO_InitStructure.GPIO_Pin = SPI_SLAVE_PIN_MISO;
00178   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00179   GPIO_Init(SPI_SLAVE_GPIO, &GPIO_InitStructure);
00180 }
00181 
00182 /**
00183   * @brief  Configure the nested vectored interrupt controller.
00184   * @param  None
00185   * @retval None
00186   */
00187 void NVIC_Configuration(void)
00188 {
00189   NVIC_InitTypeDef NVIC_InitStructure;
00190 
00191   /* 1 bit for pre-emption priority, 3 bits for subpriority */
00192   NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
00193 
00194   /* Configure and enable SPI_MASTER interrupt -------------------------------*/
00195   NVIC_InitStructure.NVIC_IRQChannel = SPI_MASTER_IRQn;
00196   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
00197   NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
00198   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
00199   NVIC_Init(&NVIC_InitStructure);
00200 
00201   /* Configure and enable SPI_SLAVE interrupt --------------------------------*/
00202   NVIC_InitStructure.NVIC_IRQChannel = SPI_SLAVE_IRQn;
00203   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
00204   NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
00205   NVIC_Init(&NVIC_InitStructure);
00206 }
00207 
00208 /**
00209   * @brief  Compares two buffers.
00210   * @param  pBuffer1, pBuffer2: buffers to be compared.
00211   * @param  BufferLength: buffer's length
00212   * @retval PASSED: pBuffer1 identical to pBuffer2
00213   *   FAILED: pBuffer1 differs from pBuffer2
00214   */
00215 TestStatus Buffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength)
00216 {
00217   while (BufferLength--)
00218   {
00219     if (*pBuffer1 != *pBuffer2)
00220     {
00221       return FAILED;
00222     }
00223 
00224     pBuffer1++;
00225     pBuffer2++;
00226   }
00227 
00228   return PASSED;
00229 }
00230 
00231 #ifdef  USE_FULL_ASSERT
00232 
00233 /**
00234   * @brief  Reports the name of the source file and the source line number
00235   *         where the assert_param error has occurred.
00236   * @param  file: pointer to the source file name
00237   * @param  line: assert_param error line source number
00238   * @retval None
00239   */
00240 void assert_failed(uint8_t* file, uint32_t line)
00241 {
00242   /* User can add his own implementation to report the file name and line number,
00243      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00244 
00245   /* Infinite loop */
00246   while (1)
00247   {}
00248 }
00249 #endif
00250 
00251 /**
00252   * @}
00253   */ 
00254 
00255 /**
00256   * @}
00257   */ 
00258 
00259 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

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