STM32F10x_StdPeriph_Examples/RCC/stm32f10x_it.c

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00001 /**
00002   ******************************************************************************
00003   * @file    RCC/stm32f10x_it.c 
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   Main Interrupt Service Routines.
00008   *          This file provides template for all exceptions handler and peripherals
00009   *          interrupt service routine.
00010   ******************************************************************************
00011   * @copy
00012   *
00013   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00014   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00015   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00016   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00017   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00018   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00019   *
00020   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00021   */ 
00022 
00023 /* Includes ------------------------------------------------------------------*/
00024 #include "stm32f10x_it.h"
00025 #include "main.h"
00026 
00027 /** @addtogroup STM32F10x_StdPeriph_Examples
00028   * @{
00029   */
00030 
00031 /** @addtogroup RCC_Example
00032   * @{
00033   */ 
00034 
00035 /* Private typedef -----------------------------------------------------------*/
00036 /* Private define ------------------------------------------------------------*/
00037 /* Private macro -------------------------------------------------------------*/
00038 /* Private variables ---------------------------------------------------------*/
00039 /* Private function prototypes -----------------------------------------------*/
00040 /* Private functions ---------------------------------------------------------*/
00041 
00042 /******************************************************************************/
00043 /*            Cortex-M3 Processor Exceptions Handlers                         */
00044 /******************************************************************************/
00045 
00046 /**
00047   * @brief  This function handles NMI exception.
00048   * @param  None
00049   * @retval None
00050   */
00051 void NMI_Handler(void)
00052 {
00053   /* This interrupt is generated when HSE clock fails */
00054 
00055   if (RCC_GetITStatus(RCC_IT_CSS) != RESET)
00056   {/* At this stage: HSE, PLL are disabled (but no change on PLL config) and HSI
00057        is selected as system clock source */
00058 
00059     /* Enable HSE */
00060     RCC_HSEConfig(RCC_HSE_ON);
00061 
00062     /* Enable HSE Ready interrupt */
00063     RCC_ITConfig(RCC_IT_HSERDY, ENABLE);
00064 
00065 #ifndef SYSCLK_HSE
00066  #ifdef STM32F10X_CL
00067     /* Enable PLL and PLL2 Ready interrupts */
00068     RCC_ITConfig(RCC_IT_PLLRDY | RCC_IT_PLL2RDY, ENABLE);
00069  #else
00070     /* Enable PLL Ready interrupt */
00071     RCC_ITConfig(RCC_IT_PLLRDY, ENABLE);
00072  #endif /* STM32F10X_CL */
00073 #endif /* SYSCLK_HSE */
00074 
00075     /* Clear Clock Security System interrupt pending bit */
00076     RCC_ClearITPendingBit(RCC_IT_CSS);
00077 
00078     /* Once HSE clock recover, the HSERDY interrupt is generated and in the RCC ISR
00079        routine the system clock will be reconfigured to its previous state (before
00080        HSE clock failure) */
00081   }
00082 }
00083 
00084 /**
00085   * @brief  This function handles Hard Fault exception.
00086   * @param  None
00087   * @retval None
00088   */
00089 void HardFault_Handler(void)
00090 {
00091   /* Go to infinite loop when Hard Fault exception occurs */
00092   while (1)
00093   {
00094   }
00095 }
00096 
00097 /**
00098   * @brief  This function handles Memory Manage exception.
00099   * @param  None
00100   * @retval None
00101   */
00102 void MemManage_Handler(void)
00103 {
00104   /* Go to infinite loop when Memory Manage exception occurs */
00105   while (1)
00106   {
00107   }
00108 }
00109 
00110 /**
00111   * @brief  This function handles Bus Fault exception.
00112   * @param  None
00113   * @retval None
00114   */
00115 void BusFault_Handler(void)
00116 {
00117   /* Go to infinite loop when Bus Fault exception occurs */
00118   while (1)
00119   {
00120   }
00121 }
00122 
00123 /**
00124   * @brief  This function handles Usage Fault exception.
00125   * @param  None
00126   * @retval None
00127   */
00128 void UsageFault_Handler(void)
00129 {
00130   /* Go to infinite loop when Usage Fault exception occurs */
00131   while (1)
00132   {
00133   }
00134 }
00135 
00136 /**
00137   * @brief  This function handles SVCall exception.
00138   * @param  None
00139   * @retval None
00140   */
00141 void SVC_Handler(void)
00142 {
00143 }
00144 
00145 /**
00146   * @brief  This function handles Debug Monitor exception.
00147   * @param  None
00148   * @retval None
00149   */
00150 void DebugMon_Handler(void)
00151 {
00152 }
00153 
00154 /**
00155   * @brief  This function handles PendSV_Handler exception.
00156   * @param  None
00157   * @retval None
00158   */
00159 void PendSV_Handler(void)
00160 {
00161 }
00162 
00163 /**
00164   * @brief  This function handles SysTick Handler.
00165   * @param  None
00166   * @retval None
00167   */
00168 void SysTick_Handler(void)
00169 {
00170 }
00171 
00172 /******************************************************************************/
00173 /*            STM32F10x Peripherals Interrupt Handlers                        */
00174 /******************************************************************************/
00175 
00176 /**
00177   * @brief  This function handles RCC interrupt request. 
00178   * @param  None
00179   * @retval None
00180   */
00181 void RCC_IRQHandler(void)
00182 {
00183   if(RCC_GetITStatus(RCC_IT_HSERDY) != RESET)
00184   { 
00185     /* Clear HSERDY interrupt pending bit */
00186     RCC_ClearITPendingBit(RCC_IT_HSERDY);
00187 
00188     /* Check if the HSE clock is still available */
00189     if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET)
00190     { 
00191 #ifdef SYSCLK_HSE
00192       /* Select HSE as system clock source */
00193       RCC_SYSCLKConfig(RCC_SYSCLKSource_HSE);
00194 #else
00195  #ifdef STM32F10X_CL
00196       /* Enable PLL2 */
00197       RCC_PLL2Cmd(ENABLE);
00198  #else
00199       /* Enable PLL: once the PLL is ready the PLLRDY interrupt is generated */ 
00200       RCC_PLLCmd(ENABLE);
00201  #endif /* STM32F10X_CL */
00202 #endif /* SYSCLK_HSE */      
00203     }
00204   }
00205 
00206 #ifdef STM32F10X_CL
00207   if(RCC_GetITStatus(RCC_IT_PLL2RDY) != RESET)
00208   { 
00209     /* Clear PLL2RDY interrupt pending bit */
00210     RCC_ClearITPendingBit(RCC_IT_PLL2RDY);
00211 
00212     /* Enable PLL: once the PLL is ready the PLLRDY interrupt is generated */ 
00213     RCC_PLLCmd(ENABLE);
00214   }
00215 #endif /* STM32F10X_CL */   
00216 
00217   if(RCC_GetITStatus(RCC_IT_PLLRDY) != RESET)
00218   { 
00219     /* Clear PLLRDY interrupt pending bit */
00220     RCC_ClearITPendingBit(RCC_IT_PLLRDY);
00221 
00222     /* Check if the PLL is still locked */
00223     if (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) != RESET)
00224     { 
00225       /* Select PLL as system clock source */
00226       RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
00227     }
00228   }
00229 }
00230 
00231 /******************************************************************************/
00232 /*                 STM32F10x Peripherals Interrupt Handlers                   */
00233 /*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
00234 /*  available peripheral interrupt handler's name please refer to the startup */
00235 /*  file (startup_stm32f10x_xx.s).                                            */
00236 /******************************************************************************/
00237 
00238 /**
00239   * @brief  This function handles PPP interrupt request.
00240   * @param  None
00241   * @retval None
00242   */
00243 /*void PPP_IRQHandler(void)
00244 {
00245 }*/
00246 
00247 /**
00248   * @}
00249   */ 
00250 
00251 /**
00252   * @}
00253   */ 
00254 
00255 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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