STM32F10x_StdPeriph_Examples/DMA/SPI_RAM/main.c

Go to the documentation of this file.
00001 /**
00002   ******************************************************************************
00003   * @file    DMA/SPI_RAM/main.c 
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   Main program body
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #include "stm32f10x.h"
00023 #include "platform_config.h"
00024 #include "stm32_eval.h"
00025 
00026 /** @addtogroup STM32F10x_StdPeriph_Examples
00027   * @{
00028   */
00029 
00030 /** @addtogroup DMA_SPI_RAM
00031   * @{
00032   */ 
00033 
00034 /* Private typedef -----------------------------------------------------------*/
00035 typedef enum { FAILED = 0, PASSED = !FAILED} TestStatus;
00036 
00037 /* Private define ------------------------------------------------------------*/
00038 #define BufferSize         32
00039 #define CRCPolynomial      7
00040 
00041 /* Private macro -------------------------------------------------------------*/
00042 /* Private variables ---------------------------------------------------------*/
00043 SPI_InitTypeDef    SPI_InitStructure;
00044 DMA_InitTypeDef    DMA_InitStructure;
00045 uint8_t SPI_MASTER_Buffer_Rx[BufferSize], SPI_SLAVE_Buffer_Rx[BufferSize];
00046 volatile uint8_t SPI_MASTERCRCValue = 0, SPI_SLAVECRCValue = 0;
00047 volatile TestStatus TransferStatus1 = FAILED, TransferStatus2 = FAILED;
00048 
00049 uint8_t SPI_MASTER_Buffer_Tx[BufferSize] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,
00050                                             0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F,0x10,
00051                                             0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,
00052                                             0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F,0x20};
00053 
00054 uint8_t SPI_SLAVE_Buffer_Tx[BufferSize] = {0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,
00055                                            0x59,0x5A,0x5B,0x5C,0x5D,0x5E,0x5F,0x60,
00056                                            0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,
00057                                            0x69,0x6A,0x6B,0x6C,0x6D,0x6E,0x6F,0x70};
00058 
00059 /* Private function prototypes -----------------------------------------------*/
00060 void RCC_Configuration(void);
00061 void GPIO_Configuration(void);
00062 TestStatus Buffercmp(uint8_t* pBuffer, uint8_t* pBuffer1, uint16_t BufferLength);
00063 
00064 /* Private functions ---------------------------------------------------------*/
00065 
00066 /**
00067   * @brief  Main program
00068   * @param  None
00069   * @retval None
00070   */
00071 int main(void)
00072 {
00073   /*!< At this stage the microcontroller clock setting is already configured, 
00074        this is done through SystemInit() function which is called from startup
00075        file (startup_stm32f10x_xx.s) before to branch to application main.
00076        To reconfigure the default setting of SystemInit() function, refer to
00077        system_stm32f10x.c file
00078      */     
00079   
00080   /* Configure the STM32_EVAL LED */
00081   STM_EVAL_LEDInit(LED1);
00082   STM_EVAL_LEDInit(LED2);
00083   /* Turn Off LED1 and LED2 */
00084   STM_EVAL_LEDOff(LED1);
00085   STM_EVAL_LEDOff(LED2);     
00086   
00087   /* System Clocks Configuration */
00088   RCC_Configuration();
00089        
00090   /* Configure the GPIO ports */
00091   GPIO_Configuration();
00092 
00093   /* SPI_MASTER configuration ------------------------------------------------*/
00094   SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
00095   SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
00096   SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
00097   SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
00098   SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
00099   SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
00100   SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
00101   SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
00102   SPI_InitStructure.SPI_CRCPolynomial = CRCPolynomial;
00103   SPI_Init(SPI_MASTER, &SPI_InitStructure);
00104   
00105   /* SPI_SLAVE configuration -------------------------------------------------*/
00106   SPI_InitStructure.SPI_Mode = SPI_Mode_Slave;
00107   SPI_Init(SPI_SLAVE, &SPI_InitStructure);
00108 
00109   /* SPI_MASTER_Rx_DMA_Channel configuration ---------------------------------*/
00110   DMA_DeInit(SPI_MASTER_Rx_DMA_Channel);
00111   DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SPI_MASTER_DR_Base;
00112   DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPI_MASTER_Buffer_Rx;
00113   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
00114   DMA_InitStructure.DMA_BufferSize = BufferSize;
00115   DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
00116   DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
00117   DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
00118   DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
00119   DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
00120   DMA_InitStructure.DMA_Priority = DMA_Priority_High;
00121   DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
00122   DMA_Init(SPI_MASTER_Rx_DMA_Channel, &DMA_InitStructure);
00123 
00124   /* SPI_MASTER_Tx_DMA_Channel configuration ---------------------------------*/
00125   DMA_DeInit(SPI_MASTER_Tx_DMA_Channel);  
00126   DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SPI_MASTER_DR_Base;
00127   DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPI_MASTER_Buffer_Tx;
00128   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
00129   DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
00130   DMA_Init(SPI_MASTER_Tx_DMA_Channel, &DMA_InitStructure);
00131 
00132   /* SPI_SLAVE_Rx_DMA_Channel configuration ----------------------------------*/
00133   DMA_DeInit(SPI_SLAVE_Rx_DMA_Channel);  
00134   DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SPI_SLAVE_DR_Base;
00135   DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPI_SLAVE_Buffer_Rx;
00136   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
00137   DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
00138   DMA_Init(SPI_SLAVE_Rx_DMA_Channel, &DMA_InitStructure);
00139 
00140   /* SPI_SLAVE_Tx_DMA_Channel configuration ----------------------------------*/
00141   DMA_DeInit(SPI_SLAVE_Tx_DMA_Channel);  
00142   DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SPI_SLAVE_DR_Base;
00143   DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)SPI_SLAVE_Buffer_Tx;
00144   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
00145   DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
00146   DMA_Init(SPI_SLAVE_Tx_DMA_Channel, &DMA_InitStructure);
00147 
00148   /* Enable SPI_MASTER DMA Tx request */
00149   SPI_I2S_DMACmd(SPI_MASTER, SPI_I2S_DMAReq_Tx, ENABLE);
00150   /* Enable SPI_MASTER DMA Rx request */
00151   SPI_I2S_DMACmd(SPI_MASTER, SPI_I2S_DMAReq_Rx, ENABLE);
00152   /* Enable SPI_SLAVE DMA Tx request */
00153   SPI_I2S_DMACmd(SPI_SLAVE, SPI_I2S_DMAReq_Tx, ENABLE);
00154   /* Enable SPI_SLAVE DMA Rx request */
00155   SPI_I2S_DMACmd(SPI_SLAVE, SPI_I2S_DMAReq_Rx, ENABLE);
00156  
00157   /* Enable SPI_MASTER CRC calculation */
00158   SPI_CalculateCRC(SPI_MASTER, ENABLE);
00159   /* Enable SPI_SLAVE CRC calculation */
00160   SPI_CalculateCRC(SPI_SLAVE, ENABLE);
00161 
00162   /* Enable SPI_SLAVE */
00163   SPI_Cmd(SPI_SLAVE, ENABLE);
00164   /* Enable SPI_MASTER */
00165   SPI_Cmd(SPI_MASTER, ENABLE);
00166 
00167   /* Enable DMA channels */
00168   DMA_Cmd(SPI_MASTER_Rx_DMA_Channel, ENABLE);
00169   DMA_Cmd(SPI_SLAVE_Rx_DMA_Channel, ENABLE);
00170   DMA_Cmd(SPI_SLAVE_Tx_DMA_Channel, ENABLE);
00171   DMA_Cmd(SPI_MASTER_Tx_DMA_Channel, ENABLE);
00172    
00173   /* Transfer complete */
00174   while(!DMA_GetFlagStatus(SPI_MASTER_Rx_DMA_FLAG));
00175   while(!DMA_GetFlagStatus(SPI_SLAVE_Rx_DMA_FLAG));
00176   while(!DMA_GetFlagStatus(SPI_SLAVE_Tx_DMA_FLAG));
00177   while(!DMA_GetFlagStatus(SPI_MASTER_Tx_DMA_FLAG));
00178 
00179   /* Wait for SPI_MASTER data reception: CRC transmitted by SPI_SLAVE */
00180   while(SPI_I2S_GetFlagStatus(SPI_MASTER, SPI_I2S_FLAG_RXNE)==RESET);
00181   /* Wait for SPI_SLAVE data reception: CRC transmitted by SPI_MASTER */
00182   while(SPI_I2S_GetFlagStatus(SPI_SLAVE, SPI_I2S_FLAG_RXNE)==RESET);
00183 
00184   /* Check the corectness of written dada */
00185   TransferStatus1 = Buffercmp(SPI_SLAVE_Buffer_Rx, SPI_MASTER_Buffer_Tx, BufferSize);
00186   TransferStatus2 = Buffercmp(SPI_MASTER_Buffer_Rx, SPI_SLAVE_Buffer_Tx, BufferSize);
00187   /* TransferStatus1, TransferStatus2 = PASSED, if the data transmitted and received 
00188      are correct */
00189   /* TransferStatus1, TransferStatus2 = FAILED, if the data transmitted and received  
00190      are different */
00191 
00192   /* Test on the SPI_MASTER CRCR ERROR flag */
00193   if ((SPI_I2S_GetFlagStatus(SPI_MASTER, SPI_FLAG_CRCERR)) != RESET)
00194   {
00195     TransferStatus1 = FAILED;
00196   }
00197   /* Test on the SPI_SLAVE CRCR ERROR flag */
00198   if ((SPI_I2S_GetFlagStatus(SPI_SLAVE, SPI_FLAG_CRCERR)) != RESET)
00199   {
00200     TransferStatus2 = FAILED;
00201   } 
00202 
00203   /* Read SPI_MASTER received CRC value */
00204   SPI_MASTERCRCValue = SPI_I2S_ReceiveData(SPI_MASTER);
00205   /* Read SPI_SLAVE received CRC value */
00206   SPI_SLAVECRCValue = SPI_I2S_ReceiveData(SPI_SLAVE);
00207 
00208   if (TransferStatus1 != FAILED)
00209   {
00210     /* OK */
00211     /* Turn on LD1 */
00212     STM_EVAL_LEDOn(LED1);
00213   }
00214   else
00215   { 
00216     /* KO */
00217     /* Turn Off LD1 */
00218     STM_EVAL_LEDOff(LED1);
00219   }
00220     
00221   if (TransferStatus2 != FAILED)
00222   {     
00223     /* OK */
00224     /* Turn on LD2 */
00225     STM_EVAL_LEDOn(LED2);
00226   }
00227   else
00228   { 
00229     /* KO */
00230     /* Turn Off LD2 */
00231     STM_EVAL_LEDOff(LED2);
00232   }
00233 
00234   while (1)
00235   {
00236   }
00237 }
00238 
00239 /**
00240   * @brief  Configures the different system clocks.
00241   * @param  None
00242   * @retval None
00243   */
00244 void RCC_Configuration(void)
00245 {
00246   /* PCLK2 = HCLK/2 */
00247   RCC_PCLK2Config(RCC_HCLK_Div2); 
00248 
00249   /* Enable peripheral clocks ------------------------------------------------*/
00250   /* Enable DMA1 or/and DMA2 clock */
00251   RCC_AHBPeriphClockCmd(SPI_MASTER_DMA_CLK | SPI_SLAVE_DMA_CLK, ENABLE);
00252 
00253 #ifdef USE_STM3210C_EVAL
00254   /* Enable GPIO clock for SPI_MASTER and SPI_SLAVE */
00255   RCC_APB2PeriphClockCmd(SPI_MASTER_GPIO_CLK | SPI_SLAVE_GPIO_CLK |
00256   RCC_APB2Periph_AFIO, ENABLE);
00257 
00258   /* Enable SPI_MASTER Periph clock */
00259   RCC_APB1PeriphClockCmd(SPI_MASTER_CLK, ENABLE);
00260                            
00261 #else
00262   /* Enable SPI_MASTER clock and GPIO clock for SPI_MASTER and SPI_SLAVE */
00263   RCC_APB2PeriphClockCmd(SPI_MASTER_GPIO_CLK | SPI_SLAVE_GPIO_CLK |
00264                          SPI_MASTER_CLK, ENABLE);
00265 #endif
00266   /* Enable SPI_SLAVE Periph clock */
00267   RCC_APB1PeriphClockCmd(SPI_SLAVE_CLK, ENABLE);
00268 }
00269 
00270 /**
00271   * @brief  Configures the different GPIO ports.
00272   * @param  None
00273   * @retval None
00274   */
00275 void GPIO_Configuration(void)
00276 {
00277   GPIO_InitTypeDef GPIO_InitStructure;
00278 
00279 #ifdef USE_STM3210C_EVAL
00280   /* Enable SPI3 Pins Software Remapping */
00281   GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE);
00282 #endif
00283 
00284   /* Configure SPI_MASTER pins: SCK and MOSI */
00285   GPIO_InitStructure.GPIO_Pin = SPI_MASTER_PIN_SCK | SPI_MASTER_PIN_MOSI;
00286   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
00287   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00288   GPIO_Init(SPI_MASTER_GPIO, &GPIO_InitStructure);
00289   /* Configure SPI_MASTER pins:  MISO */
00290   GPIO_InitStructure.GPIO_Pin = SPI_MASTER_PIN_MISO;
00291   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
00292   GPIO_Init(SPI_MASTER_GPIO, &GPIO_InitStructure);
00293 
00294   /* Configure SPI_SLAVE pins: SCK and MOSI */
00295   GPIO_InitStructure.GPIO_Pin = SPI_SLAVE_PIN_SCK | SPI_SLAVE_PIN_MOSI;
00296   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
00297   GPIO_Init(SPI_SLAVE_GPIO, &GPIO_InitStructure);
00298   /* Configure SPI_SLAVE pins: MISO  */
00299   GPIO_InitStructure.GPIO_Pin = SPI_SLAVE_PIN_MISO ;
00300   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00301   GPIO_Init(SPI_SLAVE_GPIO, &GPIO_InitStructure);
00302 }
00303 
00304 /**
00305   * @brief  Compares two buffers.
00306   * @param  pBuffer, pBuffer1: buffers to be compared.
00307   * @param  BufferLength: buffer's length
00308   * @retval PASSED: pBuffer identical to pBuffer1
00309   *   FAILED: pBuffer differs from pBuffer1
00310   */
00311 TestStatus Buffercmp(uint8_t* pBuffer, uint8_t* pBuffer1, uint16_t BufferLength)
00312 {
00313   while(BufferLength--)
00314   {
00315     if(*pBuffer != *pBuffer1)
00316     {
00317       return FAILED;
00318     }
00319     
00320     pBuffer++;
00321     pBuffer1++;
00322   }
00323 
00324   return PASSED;  
00325 }
00326 
00327 #ifdef  USE_FULL_ASSERT
00328 /**
00329   * @brief  Reports the name of the source file and the source line number
00330   *         where the assert_param error has occurred.
00331   * @param  file: pointer to the source file name
00332   * @param  line: assert_param error line source number
00333   * @retval None
00334   */
00335 void assert_failed(uint8_t* file, uint32_t line)
00336 { 
00337   /* User can add his own implementation to report the file name and line number,
00338      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00339 
00340   /* Infinite loop */
00341   while (1)
00342   {
00343   }
00344 }
00345 #endif
00346 
00347 /**
00348   * @}
00349   */ 
00350 
00351 /**
00352   * @}
00353   */ 
00354 
00355 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

      For complete documentation on STM32(CORTEX M3) 32-bit Microcontrollers platform visit  www.st.com/STM32