STM32F10x_StdPeriph_Examples/DMA/FSMC/main.c

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00001 /**
00002   ******************************************************************************
00003   * @file    DMA/FSMC/main.c 
00004   * @author  MCD Application Team
00005   * @version V3.4.0
00006   * @date    10/15/2010
00007   * @brief   Main program body.
00008   ******************************************************************************
00009   * @copy
00010   *
00011   * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
00012   * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
00013   * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
00014   * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
00015   * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
00016   * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
00019   */ 
00020 
00021 /* Includes ------------------------------------------------------------------*/
00022 #ifdef STM32F10X_HD_VL /* High-density Value line devices */
00023  #include "stm32100e_eval_fsmc_sram.h"
00024 #else /* High- and XL-density */
00025  #include "stm3210e_eval_fsmc_sram.h"
00026 #endif
00027 
00028 /** @addtogroup STM32F10x_StdPeriph_Examples
00029   * @{
00030   */
00031 
00032 /** @addtogroup DMA_FSMC
00033   * @{
00034   */ 
00035 
00036 /* Private typedef -----------------------------------------------------------*/
00037 typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus;
00038 
00039 /* Private define ------------------------------------------------------------*/
00040 #define BufferSize  32
00041 #define Bank1_SRAM3_ADDR    ((uint32_t)0x68000000)
00042 
00043 /* Private macro -------------------------------------------------------------*/
00044 /* Private variables ---------------------------------------------------------*/
00045 DMA_InitTypeDef    DMA_InitStructure;
00046 volatile TestStatus TransferStatus;
00047 const uint32_t SRC_Const_Buffer[BufferSize]= {
00048                             0x01020304,0x05060708,0x090A0B0C,0x0D0E0F10,
00049                             0x11121314,0x15161718,0x191A1B1C,0x1D1E1F20,
00050                             0x21222324,0x25262728,0x292A2B2C,0x2D2E2F30,
00051                             0x31323334,0x35363738,0x393A3B3C,0x3D3E3F40,
00052                             0x41424344,0x45464748,0x494A4B4C,0x4D4E4F50,
00053                             0x51525354,0x55565758,0x595A5B5C,0x5D5E5F60,
00054                             0x61626364,0x65666768,0x696A6B6C,0x6D6E6F70,
00055                             0x71727374,0x75767778,0x797A7B7C,0x7D7E7F80};
00056 uint8_t DST_Buffer[4*BufferSize];
00057 uint32_t Idx = 0;
00058 
00059 /* Private function prototypes -----------------------------------------------*/
00060 void RCC_Configuration(void);
00061 TestStatus Buffercmp(const uint32_t* pBuffer, uint32_t* pBuffer1, uint16_t BufferLength);
00062 
00063 /* Private functions ---------------------------------------------------------*/
00064 
00065 /**
00066   * @brief  Main program.
00067   * @param  None
00068   * @retval None
00069   */
00070 int main(void)
00071 {
00072   /*!< At this stage the microcontroller clock setting is already configured, 
00073        this is done through SystemInit() function which is called from startup
00074        file (startup_stm32f10x_xx.s) before to branch to application main.
00075        To reconfigure the default setting of SystemInit() function, refer to
00076        system_stm32f10x.c file
00077      */     
00078        
00079   /* System Clocks Configuration */
00080   RCC_Configuration();
00081 
00082   /* FSMC for SRAM and SRAM pins configuration */
00083   SRAM_Init();
00084 
00085   /* Write to FSMC -----------------------------------------------------------*/
00086   /* DMA2 channel5 configuration */
00087   DMA_DeInit(DMA2_Channel5);
00088   DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SRC_Const_Buffer;
00089   DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)Bank1_SRAM3_ADDR;    
00090   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
00091   DMA_InitStructure.DMA_BufferSize = 32;
00092   DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
00093   DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
00094   DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
00095   DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
00096   DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
00097   DMA_InitStructure.DMA_Priority = DMA_Priority_High;
00098   DMA_InitStructure.DMA_M2M = DMA_M2M_Enable;
00099   DMA_Init(DMA2_Channel5, &DMA_InitStructure);
00100 
00101   /* Enable DMA2 channel5 */
00102   DMA_Cmd(DMA2_Channel5, ENABLE);
00103 
00104   /* Check if DMA2 channel5 transfer is finished */
00105   while(!DMA_GetFlagStatus(DMA2_FLAG_TC5));
00106 
00107   /* Clear DMA2 channel5 transfer complete flag bit */
00108   DMA_ClearFlag(DMA2_FLAG_TC5);
00109 
00110   /* Read from FSMC ----------------------------------------------------------*/
00111   /* Destination buffer initialization */ 
00112   for(Idx=0; Idx<128; Idx++) DST_Buffer[Idx]=0;
00113 
00114   /* DMA1 channel3 configuration */
00115   DMA_DeInit(DMA1_Channel3);
00116   DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)Bank1_SRAM3_ADDR;  
00117   DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)DST_Buffer;
00118   DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
00119   DMA_InitStructure.DMA_BufferSize = 128;
00120   DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
00121   DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
00122   DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
00123   DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
00124   DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
00125   DMA_InitStructure.DMA_Priority = DMA_Priority_High;
00126   DMA_InitStructure.DMA_M2M = DMA_M2M_Enable;
00127   DMA_Init(DMA1_Channel3, &DMA_InitStructure);
00128 
00129   /* Enable DMA1 channel3 */
00130   DMA_Cmd(DMA1_Channel3, ENABLE);
00131 
00132   /* Check if DMA1 channel3 transfer is finished */
00133   while(!DMA_GetFlagStatus(DMA1_FLAG_TC3));
00134 
00135   /* Clear DMA1 channel3 transfer complete flag bit */
00136   DMA_ClearFlag(DMA1_FLAG_TC3);
00137 
00138   /* Check if the transmitted and received data are equal */
00139   TransferStatus = Buffercmp(SRC_Const_Buffer, (uint32_t*)DST_Buffer, BufferSize);
00140   /* TransferStatus = PASSED, if the transmitted and received data 
00141      are the same */
00142   /* TransferStatus = FAILED, if the transmitted and received data 
00143      are different */
00144 
00145   while (1)
00146   {
00147   }
00148 }
00149 
00150 /**
00151   * @brief  Configures the different system clocks.
00152   * @param  None
00153   * @retval None
00154   */
00155 void RCC_Configuration(void)
00156 {   
00157   /* Enable peripheral clocks ------------------------------------------------*/
00158   /* DMA1 and DMA2 clock enable */
00159   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_DMA2, ENABLE);
00160   /* FSMC clock enable */
00161   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
00162 }
00163 
00164 /**
00165   * @brief  Compares two buffers.
00166   * @param  pBuffer, pBuffer1: buffers to be compared.
00167   * @param  BufferLength: buffer's length
00168   * @retval PASSED: pBuffer identical to pBuffer1
00169   *   FAILED: pBuffer differs from pBuffer1
00170   */
00171 TestStatus Buffercmp(const uint32_t* pBuffer, uint32_t* pBuffer1, uint16_t BufferLength)
00172 {
00173   while(BufferLength--)
00174   {
00175     if(*pBuffer != *pBuffer1)
00176     {
00177       return FAILED;
00178     }
00179     
00180     pBuffer++;
00181     pBuffer1++;
00182   }
00183 
00184   return PASSED;  
00185 }
00186 
00187 #ifdef  USE_FULL_ASSERT
00188 /**
00189   * @brief  Reports the name of the source file and the source line number
00190   *         where the assert_param error has occurred.
00191   * @param  file: pointer to the source file name
00192   * @param  line: assert_param error line source number
00193   * @retval None
00194   */
00195 void assert_failed(uint8_t* file, uint32_t line)
00196 { 
00197   /* User can add his own implementation to report the file name and line number,
00198      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
00199 
00200   /* Infinite loop */
00201   while (1)
00202   {
00203   }
00204 }
00205 #endif
00206 
00207 /**
00208   * @}
00209   */ 
00210 
00211 /**
00212   * @}
00213   */ 
00214 
00215 /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
STM32F10x Standard Peripherals Library: Footer

 

 

 

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